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iq80321 pci tweak
- From: Mark Salter <msalter at redhat dot com>
- To: ecos-patches at sources dot redhat dot com
- Date: Sat, 22 Feb 2003 11:53:29 -0500 (EST)
- Subject: iq80321 pci tweak
Having BAR0 be prefetchable can cause problems with messaging unit in
some situations.
--Mark
Index: hal/arm/xscale/iq80321/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80321/current/ChangeLog,v
retrieving revision 1.12
diff -u -p -5 -r1.12 ChangeLog
--- hal/arm/xscale/iq80321/current/ChangeLog 12 Feb 2003 13:34:02 -0000 1.12
+++ hal/arm/xscale/iq80321/current/ChangeLog 22 Feb 2003 16:49:35 -0000
@@ -1,5 +1,9 @@
+2003-02-22 Mark Salter <msalter at redhat dot com>
+
+ * src/iq80321_pci.c (cyg_hal_plf_pci_init): Make BAR0 non-prefetchable.
+
2003-02-12 Mark Salter <msalter at redhat dot com>
* include/iq80321.h: Fix battery defines.
* src/diag/battery.c: Fix battery tests to match updated docs.
Index: hal/arm/xscale/iq80321/current/src/iq80321_pci.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80321/current/src/iq80321_pci.c,v
retrieving revision 1.3
diff -u -p -5 -r1.3 iq80321_pci.c
--- hal/arm/xscale/iq80321/current/src/iq80321_pci.c 12 Aug 2002 15:31:55 -0000 1.3
+++ hal/arm/xscale/iq80321/current/src/iq80321_pci.c 22 Feb 2003 16:49:35 -0000
@@ -6,11 +6,11 @@
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
@@ -122,10 +122,13 @@ cyg_hal_plf_pci_init(void)
// on switch settings.
*GPIO_GPOE &= ~(1 << IQ80321_GBE_GPIO_PIN);
*GPIO_GPOD |= (1 << IQ80321_GBE_GPIO_PIN);
hal_pci_inbound_window_mask = ~dram_limit;
+
+ // Force BAR0 to be non-prefetchable to allow proper MU usage
+ *ATU_IABAR0 &= ~CYG_PRI_CFG_BAR_MEM_PREFETCH;
#ifdef CYG_HAL_STARTUP_ROM
#ifdef CYGSEM_HAL_ARM_IQ80321_CLEAR_PCI_RETRY
if (!hal_pcsr_cfg_retry || !cyg_hal_plf_wait_for_bios())
#endif // CYGSEM_HAL_ARM_IQ80321_CLEAR_PCI_RETRY