This is the mail archive of the
ecos-patches@sources.redhat.com
mailing list for the eCos project.
misc ecos fixes
- From: Mark Salter <msalter at redhat dot com>
- To: ecos-patches at sources dot redhat dot com
- Date: Tue, 4 Feb 2003 17:28:11 -0500 (EST)
- Subject: misc ecos fixes
Index: hal/arm/xscale/cores/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/cores/current/ChangeLog,v
retrieving revision 1.3
diff -u -p -5 -r1.3 ChangeLog
--- hal/arm/xscale/cores/current/ChangeLog 13 Nov 2002 15:43:20 -0000 1.3
+++ hal/arm/xscale/cores/current/ChangeLog 4 Feb 2003 22:23:21 -0000
@@ -1,5 +1,15 @@
+2003-02-04 Mark Salter <msalter@redhat.com>
+
+ * cdl/hal_arm_xscale_core.cdl (CYGSEM_HAL_ARM_XSCALE_BTB): New option.
+
+ * include/hal_xscale.h: Make enabling of BTB conditional on
+ CYGSEM_HAL_ARM_XSCALE_BTB.
+
+ * include/hal_cache.h: Support systems using write-through caching
+ which need no DCACHE_FLUSH_AREA.
+
2002-11-13 Mark Salter <msalter@redhat.com>
* src/xscale_stub.c (find_watch_address): Squelch compiler warning.
2002-10-01 Jonathan Larmour <jifl@eCosCentric.com>
@@ -22,11 +32,11 @@
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
Index: hal/arm/xscale/cores/current/cdl/hal_arm_xscale_core.cdl
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/cores/current/cdl/hal_arm_xscale_core.cdl,v
retrieving revision 1.1
diff -u -p -5 -r1.1 hal_arm_xscale_core.cdl
--- hal/arm/xscale/cores/current/cdl/hal_arm_xscale_core.cdl 23 Sep 2002 15:57:53 -0000 1.1
+++ hal/arm/xscale/cores/current/cdl/hal_arm_xscale_core.cdl 4 Feb 2003 22:23:21 -0000
@@ -60,6 +60,20 @@ cdl_package CYGPKG_HAL_ARM_XSCALE_CORE {
a specific target platform and CPU HAL package."
implements CYGINT_HAL_ARM_ARCH_XSCALE
compile xscale_misc.c xscale_stub.c
+
+ cdl_option CYGSEM_HAL_ARM_XSCALE_BTB {
+ display "Enable Branch Target Buffer"
+ flavor bool
+ default_value 1
+ description "
+ This option controls whether or not the Branch Target
+ Buffer is enabled. The BTB is used for branch prediction
+ and can have significant performance benefits. Control
+ is provided because there is an errata for A-step 80200
+ CPUS which will lead to problems with thumb branches
+ if the BTB is on. Normal ARM programs are not affected
+ by this errata."
+ }
}
Index: hal/arm/xscale/cores/current/include/hal_cache.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/cores/current/include/hal_cache.h,v
retrieving revision 1.2
diff -u -p -5 -r1.2 hal_cache.h
--- hal/arm/xscale/cores/current/include/hal_cache.h 1 Oct 2002 02:18:05 -0000 1.2
+++ hal/arm/xscale/cores/current/include/hal_cache.h 4 Feb 2003 22:23:21 -0000
@@ -9,11 +9,11 @@
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
@@ -244,13 +244,16 @@ CYG_MACRO_START /* this macro can dis
: \
: "r1" /* Clobber list */ \
); \
CYG_MACRO_END
+// DCACHE_FLUSH_AREA is defined if writeback caching is used. Otherwise
+// write-through is assumed.
+#ifdef DCACHE_FLUSH_AREA
-// Synchronize the contents of the cache with memory.
-#define HAL_DCACHE_SYNC() \
+// Evict dirty lines from write-back caches
+#define HAL_DCACHE_EVICT() \
CYG_MACRO_START \
/* The best way to evict a dirty line is by using the */ \
/* line allocate operation on non-existent memory. */ \
asm volatile ( \
"mov r0, %0;" /* cache flush region */ \
@@ -258,10 +261,24 @@ CYG_MACRO_START
"667: " \
"mcr p15,0,r0,c7,c2,5;" /* allocate a line */ \
"add r0, r0, #32;" /* 32 bytes/line */ \
"teq r1, r0;" \
"bne 667b;" \
+ : \
+ : "i" (DCACHE_FLUSH_AREA) \
+ : "r0","r1" /* Clobber list */ \
+ ); \
+CYG_MACRO_END
+#else
+#define HAL_DCACHE_EVICT()
+#endif
+
+// Synchronize the contents of the cache with memory.
+#define HAL_DCACHE_SYNC() \
+CYG_MACRO_START \
+ HAL_DCACHE_EVICT(); \
+ asm volatile ( \
"mcr p15,0,r0,c7,c6,0;" /* invalidate data cache */ \
/* cpuwait */ \
"mrc p15,0,r1,c2,c0,0;" /* arbitrary read */ \
"mov r1,r1;" \
"sub pc,pc,#4;" \
@@ -270,11 +287,11 @@ CYG_MACRO_START
"mrc p15,0,r1,c2,c0,0;" /* arbitrary read */ \
"mov r1,r1;" \
"sub pc,pc,#4;" \
"nop" \
: \
- : "i" (DCACHE_FLUSH_AREA) \
+ : \
: "r0","r1" /* Clobber list */ \
); \
CYG_MACRO_END
// Set the data cache refill burst size
@@ -287,13 +304,19 @@ CYG_MACRO_END
#define HAL_DCACHE_WRITETHRU_MODE 0
#define HAL_DCACHE_WRITEBACK_MODE 1
// Get the current writeback mode - or only writeback mode if fixed
+#ifdef DCACHE_FLUSH_AREA
#define HAL_DCACHE_QUERY_WRITE_MODE( _mode_ ) CYG_MACRO_START \
_mode_ = HAL_DCACHE_WRITEBACK_MODE; \
CYG_MACRO_END
+#else
+#define HAL_DCACHE_QUERY_WRITE_MODE( _mode_ ) CYG_MACRO_START \
+ _mode_ = HAL_DCACHE_WRITETHRU_MODE; \
+CYG_MACRO_END
+#endif
// Load the contents of the given address range into the data cache
// and then lock the cache so that it stays there.
//#define HAL_DCACHE_LOCK(_base_, _size_)
// This feature is not available on the XScale.
Index: hal/arm/xscale/cores/current/include/hal_xscale.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/cores/current/include/hal_xscale.h,v
retrieving revision 1.1
diff -u -p -5 -r1.1 hal_xscale.h
--- hal/arm/xscale/cores/current/include/hal_xscale.h 23 Sep 2002 15:57:53 -0000 1.1
+++ hal/arm/xscale/cores/current/include/hal_xscale.h 4 Feb 2003 22:23:21 -0000
@@ -6,11 +6,11 @@
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
@@ -52,10 +52,11 @@
//===========================================================================*/
#ifndef CYGONCE_HAL_ARM_XSCALE_HAL_XSCALE_H
#define CYGONCE_HAL_ARM_XSCALE_HAL_XSCALE_H
#include <pkgconf/system.h>
+#include <pkgconf/hal_arm_xscale_core.h>
#ifdef __ASSEMBLER__
// Useful CPU macros
// Delay a bit
@@ -73,11 +74,15 @@
.endm
// Enable the BTB
.macro BTB_INIT reg
mrc p15, 0, \reg, c1, c0, 0
+#ifdef CYGSEM_HAL_ARM_XSCALE_BTB
orr \reg, \reg, #MMU_Control_BTB
+#else
+ bic \reg, \reg, #MMU_Control_BTB
+#endif
mcr p15, 0, \reg, c1, c0, 0
CPWAIT \reg
.endm
#else
static inline void CPWAIT(void) {
Index: hal/arm/xscale/iop310/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iop310/current/ChangeLog,v
retrieving revision 1.3
diff -u -p -5 -r1.3 ChangeLog
--- hal/arm/xscale/iop310/current/ChangeLog 22 Jan 2003 13:33:12 -0000 1.3
+++ hal/arm/xscale/iop310/current/ChangeLog 4 Feb 2003 22:23:21 -0000
@@ -1,5 +1,11 @@
+2003-02-04 Mark Salter <msalter@redhat.com>
+
+ * include/hal_iop310.h (IOP310_EARLY_PCI_SETUP): Fix ifdef test.
+
+ * cdl/hal_arm_xscale_iop310.cdl: Remove CYGSEM_HAL_ARM_IOP310_BTB.
+
2003-01-22 Mark Salter <msalter@redhat.com>
* include/var_io.h: Remove unused duplicate code.
* include/hal_iop310.h: Add some more register definitions.
* src/iop310_pci.c (cyg_hal_plf_pci_init): Use new register
Index: hal/arm/xscale/iop310/current/cdl/hal_arm_xscale_iop310.cdl
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iop310/current/cdl/hal_arm_xscale_iop310.cdl,v
retrieving revision 1.1
diff -u -p -5 -r1.1 hal_arm_xscale_iop310.cdl
--- hal/arm/xscale/iop310/current/cdl/hal_arm_xscale_iop310.cdl 12 Nov 2002 17:38:49 -0000 1.1
+++ hal/arm/xscale/iop310/current/cdl/hal_arm_xscale_iop310.cdl 4 Feb 2003 22:23:22 -0000
@@ -292,23 +292,10 @@ cdl_package CYGPKG_HAL_ARM_XSCALE_IOP310
description "
Package specific build options including control over
compiler flags used only in building this package,
and details of which tests are built."
- cdl_option CYGSEM_HAL_ARM_IOP310_BTB {
- display "Enable Branch Target Buffer"
- flavor bool
- default_value 0
- description "
- Enable this option to turn on the IQ80200 Branch Target Buffer
- which is used for branch prediction. This is turned off by
- default because of CPU errata which may cause thumb branches
- to execute improperly on A-step CPUs. Normal ARM programs are
- not affected by this errata, so enabling this option for
- ARM-only applications may improve program performance."
- }
-
cdl_option CYGSEM_HAL_ARM_IOP310_CLEAR_PCI_RETRY {
display "Have RedBoot clear PCI Retry bit"
flavor bool
default_value 1
description "
Index: hal/arm/xscale/iop310/current/include/hal_iop310.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iop310/current/include/hal_iop310.h,v
retrieving revision 1.3
diff -u -p -5 -r1.3 hal_iop310.h
--- hal/arm/xscale/iop310/current/include/hal_iop310.h 22 Jan 2003 13:33:12 -0000 1.3
+++ hal/arm/xscale/iop310/current/include/hal_iop310.h 4 Feb 2003 22:23:22 -0000
@@ -644,11 +644,11 @@ extern unsigned int _80312_EMISR; // On
str \reg1, [\reg0]
ldr \reg0, =PIALR_ADDR
sub \reg1, \reg_dram_size, #1 // dram_size - 1
mvn \reg1, \reg1 // 1s complement
str \reg1, [\reg0]
-#ifdef CYGSEM_HAL_ARM_IQ80310_CLEAR_PCI_RETRY
+#ifdef CYGSEM_HAL_ARM_IOP310_CLEAR_PCI_RETRY
ldr \reg0, =EBCR_ADDR
mov \reg1, #0x0008
strh \reg1, [\reg0]
#endif
.endm
Index: hal/arm/xscale/iq80310/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80310/current/ChangeLog,v
retrieving revision 1.5
diff -u -p -5 -r1.5 ChangeLog
--- hal/arm/xscale/iq80310/current/ChangeLog 30 Jan 2003 14:47:52 -0000 1.5
+++ hal/arm/xscale/iq80310/current/ChangeLog 4 Feb 2003 22:23:24 -0000
@@ -1,5 +1,15 @@
+2003-01-31 Mark Salter <msalter@redhat.com>
+
+ * include/hal_platform_setup.h: Disabling of write buffer
+ is not necessary.
+
+ * misc/redboot_RAM.ecm: Don't enable BTB for RedBoot.
+ * misc/redboot_RAMA.ecm: Ditto.
+ * misc/redboot_ROM.ecm: Ditto.
+ * misc/redboot_ROMA.ecm: Ditto.
+
2003-01-30 Mark Salter <msalter@redhat.com>
* include/pkgconf/mlt_*: Adjust RAM size to match max supported.
Actual size of installed RAM determined at runtime.
Index: hal/arm/xscale/iq80310/current/include/hal_platform_setup.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80310/current/include/hal_platform_setup.h,v
retrieving revision 1.2
diff -u -p -5 -r1.2 hal_platform_setup.h
--- hal/arm/xscale/iq80310/current/include/hal_platform_setup.h 13 Nov 2002 15:43:22 -0000 1.2
+++ hal/arm/xscale/iq80310/current/include/hal_platform_setup.h 4 Feb 2003 22:23:24 -0000
@@ -9,11 +9,11 @@
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
@@ -249,16 +249,10 @@
.endr
_real_platform_setup:
// Drain write and fill buffer
mcr p15,0,r0,c7,c10,4
- CPWAIT r0
-
- // Disable write buffer coalescing
- mrc p15,0,r0,c1,c0,1
- orr r0,r0,#1 // set the disable bit
- mcr p15,0,r0,c1,c0,1
CPWAIT r0
// Delay appx 60 ms to let battery-backup reset complete
DELAY_FOR 0x400000, r0
// Eventually we will be able to check a register bit
Index: hal/arm/xscale/iq80310/current/misc/redboot_RAM.ecm
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80310/current/misc/redboot_RAM.ecm,v
retrieving revision 1.2
diff -u -p -5 -r1.2 redboot_RAM.ecm
--- hal/arm/xscale/iq80310/current/misc/redboot_RAM.ecm 13 Nov 2002 15:43:22 -0000 1.2
+++ hal/arm/xscale/iq80310/current/misc/redboot_RAM.ecm 4 Feb 2003 22:23:24 -0000
@@ -131,5 +131,9 @@ cdl_option CYGSEM_IO_FLASH_VERIFY_PROGRA
};
cdl_option CYGPKG_HAL_GDB_FILEIO {
user_value 1
};
+
+cdl_option CYGSEM_HAL_ARM_XSCALE_BTB {
+ user_value 0
+};
Index: hal/arm/xscale/iq80310/current/misc/redboot_RAMA.ecm
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80310/current/misc/redboot_RAMA.ecm,v
retrieving revision 1.2
diff -u -p -5 -r1.2 redboot_RAMA.ecm
--- hal/arm/xscale/iq80310/current/misc/redboot_RAMA.ecm 13 Nov 2002 15:43:22 -0000 1.2
+++ hal/arm/xscale/iq80310/current/misc/redboot_RAMA.ecm 4 Feb 2003 22:23:24 -0000
@@ -90,5 +90,9 @@ cdl_option CYGSEM_IO_FLASH_VERIFY_PROGRA
};
cdl_option CYGPKG_HAL_GDB_FILEIO {
user_value 1
};
+
+cdl_option CYGSEM_HAL_ARM_XSCALE_BTB {
+ user_value 0
+};
Index: hal/arm/xscale/iq80310/current/misc/redboot_ROM.ecm
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80310/current/misc/redboot_ROM.ecm,v
retrieving revision 1.2
diff -u -p -5 -r1.2 redboot_ROM.ecm
--- hal/arm/xscale/iq80310/current/misc/redboot_ROM.ecm 13 Nov 2002 15:43:22 -0000 1.2
+++ hal/arm/xscale/iq80310/current/misc/redboot_ROM.ecm 4 Feb 2003 22:23:24 -0000
@@ -135,5 +135,9 @@ cdl_option CYGSEM_IO_FLASH_VERIFY_PROGRA
};
cdl_option CYGPKG_HAL_GDB_FILEIO {
user_value 1
};
+
+cdl_option CYGSEM_HAL_ARM_XSCALE_BTB {
+ user_value 0
+};
Index: hal/arm/xscale/iq80310/current/misc/redboot_ROMA.ecm
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/iq80310/current/misc/redboot_ROMA.ecm,v
retrieving revision 1.2
diff -u -p -5 -r1.2 redboot_ROMA.ecm
--- hal/arm/xscale/iq80310/current/misc/redboot_ROMA.ecm 13 Nov 2002 15:43:22 -0000 1.2
+++ hal/arm/xscale/iq80310/current/misc/redboot_ROMA.ecm 4 Feb 2003 22:23:24 -0000
@@ -98,5 +98,9 @@ cdl_option CYGSEM_IO_FLASH_VERIFY_PROGRA
};
cdl_option CYGPKG_HAL_GDB_FILEIO {
user_value 1
};
+
+cdl_option CYGSEM_HAL_ARM_XSCALE_BTB {
+ user_value 0
+};