[ECOS] LPC2xxx timer problem

[Steve Wheeler <SWheeler at vestatech dot com>]

We've been developing an eCos port for a new LPC2292 board, and I've
been running the test programs recently. From running tm_basic.cxx, I've
discovered what appears to be a problem common to all LPC2xxx
implementations.

The problem occurs when the counter wraps, and the value read for a
test's end time is less than the value read for the start time.
Tm_basic.cxx adds CYGNUM_KERNEL_COUNTERS_RTC_PERIOD to the difference
between the times to correct for the wraparound. In the CDL files, this
is defined as equal to CYGNUM_HAL_RTC_PERIOD, which is in turn defined
as CYGNUM_HAL_ARM_LPC2XXX_CLOCK_SPEED divided by
CYGNUM_HAL_RTC_DENOMINATOR.

On our board, this calculation results in a value of 600000, based on a
15MHz oscillator input with a PLL multiplier of 4. However, in the
routine hal_clock_initialize() in lpc2xxx_misc.c, the value programmed
into the timer match register is scaled by the VBPDIV value, so the
counter on our board actually wraps at 150000.

The code I'm working with matches what's in the repository, and I've
found no indication in the list archives that anyone's run across this
before. It appears that this will be a problem with any LPC2xxx
implementation where VPBDIV is set to divide the system clock by 2 or 4.

Is the appropriate fix to change how CYGNUM_HAL_RTC_PERIOD is defined,
so that it takes the VPBDIV value into account? The way the LPC's clocks
interrelate it's not obvious to me that that won't break something else,
but it looks like a reasonable place to start.

Steven R. Wheeler
Sr. Software Engineer
Vesta Technology, Inc.
(303) 422-8088
http://www.vestatech.com



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