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Re: ARM arch: unknown asm insn "mrc" in v5T_semantics()
- From: daniel dot neri at sigicom dot se (Daniel Néri)
- To: ecos-discuss at sources dot redhat dot com
- Date: Tue, 16 Mar 2004 14:45:00 +0100
- Subject: [ECOS] Re: ARM arch: unknown asm insn "mrc" in v5T_semantics()
- Organization: Sigicom AB, Stockholm, Sweden
- References: <4056F72F.1090909@web.de> <20040316125817.92E487907B@deneb.localdomain>
Mark Salter <msalter@redhat.com> writes:
>>>>>> Heiko Panther writes:
>
>> I'm targetting an ARM7 TDMI processor, and gcc 3.3.2 complains about
>> this inline asm instruction from function arm_stub.h:v5T_semantics().
>
>> asm volatile ("mrc p15,0,%0,c0,c0,0\n"
>> : "=r" (id) : /* no inputs */);
>
>> What's up with this insn, I can't find it in the reference. And what
>> should I correct to make it work?
>
> Which reference? It is covered in the ARM Architectural Reference Manual.
> The instruction reads the CPU ID register and is valid for all ARM cpus.
It doesn't "compile" in Thumb mode though. I'm not sure if it helps
Heiko, but I have the following quick fix in my tree:
static int
v5T_semantics(void)
{
#ifdef CYGINT_HAL_ARM_ARCH_ARM7
return 0;
#else
unsigned id;
asm volatile ("mrc p15,0,%0,c0,c0,0\n"
: "=r" (id) : /* no inputs */);
return ((id >> 16) & 0xff) >= 5;
#endif
}
Regards
--Daniel
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