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rom Origin: 0x00000000 on VADS fails
- From: sai jayram <sai at cdotb dot ernet dot in>
- To: ecos-discuss at sources dot redhat dot com
- Date: Fri, 30 Jan 2004 21:02:09 +0500 (GMT+0500)
- Subject: [ECOS] rom Origin: 0x00000000 on VADS fails
Hello.
I am trying to port Ecos on our custom design which uses 8260 processor.
My memory layout is as follows:
Rom : 0x00000000 Size : 0x000100000
Ram : 0x30000000 Size : 0x080000000
while creating a ROM version of VADS board with layout changed for my
memory layout, I am encountering a strange problem.
I create an ELF file and when I perform objdump, I get the dump as shown
in ANN: A (at the end of mail) . In the dump, the C files and assembly
files get overlapped.
If I change the start address of ROM from 0x00000000 to any other
address, then the dump is fine. For ROM starting address of 0x00000200,
the dump is as shown in ANN : B (at the end of mail)
I am using the folowing in rom.ldi file.
MEMORY
{
ram : ORIGIN = 0x30000000, LENGTH = 0x07000000
rom : ORIGIN = 0x00000000, LENGTH = 0x00100000
}
SECTIONS
{
SECTIONS_BEGIN
SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
. = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000;
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x1);
. = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x1);
. = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
SECTION_data (ram, 0x30000000, FOLLOWING (.gcc_except_table))
SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
Can anyone suggest the bug in the script..?
Thanx in advance
Rgds
sai
****************************
ANN: A
***************************
Sections:
Idx Name Size VMA LMA File off Algn
0 .vectors 00001500 00000000 00000000 00010000 2**8
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .text 00007a50 00001500 00001500 00011500 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .fini 00000000 00008f50 00008f50 000204f8 2**0
CONTENTS
3 .rodata1 00000000 00008f50 00008f50 000204f8 2**0
CONTENTS
4 .rodata 000007d4 00008f50 00008f50 00018f50 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .fixup 00000000 00009724 00009724 000204f8 2**0
CONTENTS
6 .gcc_except_table 00000000 00009724 00009724 000204f8 2**0
CONTENTS
7 .data 000004f8 30000000 00009728 00020000 2**3
CONTENTS, ALLOC, LOAD, CODE
8 .sbss 00000048 300004f8 300004f8 000204f8 2**2
ALLOC
9 .bss 00003f88 30000540 30000540 000204f8 2**4
ALLOC
10 .debug_line 0001074f 00000000 00000000 000204f8 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_info 000ea43d 00000000 00000000 00030c47 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_abbrev 0000b95a 00000000 00000000 0011b084 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_aranges 00001628 00000000 00000000 001269e0 2**3
CONTENTS, READONLY, DEBUGGING
14 .debug_frame 0000334c 00000000 00000000 00128008 2**2
CONTENTS, READONLY, DEBUGGING
15 .debug_pubnames 000035bf 00000000 00000000 0012b354 2**0
CONTENTS, READONLY, DEBUGGING
16 .debug_str 0000a66c 00000000 00000000 0012e913 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_ranges 00000568 00000000 00000000 00138f7f 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .vectors:
00000000 <__exception_reserved>:
__exception_reserved():
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/vectors.S:240
rom_vectors:
# These are the architecture defined vectors that
# are always present.
#ifdef CYG_HAL_RESERVED_VECTOR_00000
hal_reserved_vector_00000
0: 7c 08 02 a6 mflr r0
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/hal_misc.c:278
// as detailed in hal_cache.h, and the variant HAL providing the
// MMU mapping/clear functions.
externC void
hal_MMU_init (void)
{
4: 3c 20 04 70 lis r1,1136
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/hal_intr.c:72
// Delay for some number of useconds.
externC void
hal_delay_us(int us)
{
8: 60 21 00 10 ori r1,r1,16
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/hal_intr.c:79
cyg_int32 old_dec, new_dec;
long ticks;
int diff;
// Note: the system constant CYGNUM_HAL_RTC_PERIOD corresponds to
10,000us
// Scale the desired number of microseconds to be a number of
decrementer ticks
ticks = ((long long)us * (CYGNUM_HAL_RTC_PERIOD * 100)) / 1000000;
c: 3c 40 12 34 lis r2,4660
10: 60 42 56 78 ori r2,r2,22136
14: 90 01 00 00 stw r0,0(r1)
18: 3c 60 00 00 lis r3,0
1c: 60 63 00 00 ori r3,r3,0
20: 90 61 00 04 stw r3,4(r1)
24: 90 41 00 08 stw r2,8(r1)
28: 60 00 00 00 nop
2c: 60 00 00 00 nop
30: 60 00 00 00 nop
34: 4b ff ff f4 b 28 <CYGARC_JMPBUF_R21>
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/hal_intr.c:80
asm volatile("mfdec %0;" : "=r"(old_dec) : );
38: 60 00 00 00 nop
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/hal_intr.c:81
while (ticks > 0) {
3c: 60 00 00 00 nop
40: 60 00 00 00 nop
44: 60 00 00 00 nop
48: 60 00 00 00 nop
*********************************
ANN : B
*********************************
pic_ver2.elf: file format elf32-powerpc
Sections:
Idx Name Size VMA LMA File off Algn
0 .vectors 00001500 00000200 00000200 00000200 2**8
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .text 00007a50 00001700 00001700 00001700 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .fini 00000000 00009150 00009150 000104f8 2**0
CONTENTS
3 .rodata1 00000000 00009150 00009150 000104f8 2**0
CONTENTS
4 .rodata 000007d4 00009150 00009150 00009150 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .fixup 00000000 00009924 00009924 000104f8 2**0
CONTENTS
6 .gcc_except_table 00000000 00009924 00009924 000104f8 2**0
CONTENTS
7 .data 000004f8 30000000 00009928 00010000 2**3
CONTENTS, ALLOC, LOAD, CODE
8 .sbss 00000048 300004f8 300004f8 000104f8 2**2
ALLOC
9 .bss 00003f88 30000540 30000540 000104f8 2**4
ALLOC
10 .debug_line 0001074f 00000000 00000000 000104f8 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_info 000ea43d 00000000 00000000 00020c47 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_abbrev 0000b95a 00000000 00000000 0010b084 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_aranges 00001628 00000000 00000000 001169e0 2**3
CONTENTS, READONLY, DEBUGGING
14 .debug_frame 0000334c 00000000 00000000 00118008 2**2
CONTENTS, READONLY, DEBUGGING
15 .debug_pubnames 000035bf 00000000 00000000 0011b354 2**0
CONTENTS, READONLY, DEBUGGING
16 .debug_str 0000a66c 00000000 00000000 0011e913 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_ranges 00000568 00000000 00000000 00128f7f 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .vectors:
00000200 <__exception_reserved>:
__exception_reserved():
/home/pic/ecos-2.0/packages/hal/powerpc/arch/v2_0/src/vectors.S:240
rom_vectors:
# These are the architecture defined vectors that
# are always present.
#ifdef CYG_HAL_RESERVED_VECTOR_00000
hal_reserved_vector_00000
200: 7c 08 02 a6 mflr r0
204: 3c 20 04 70 lis r1,1136
208: 60 21 00 10 ori r1,r1,16
20c: 3c 40 12 34 lis r2,4660
210: 60 42 56 78 ori r2,r2,22136
214: 90 01 00 00 stw r0,0(r1)
218: 3c 60 00 00 lis r3,0
21c: 60 63 02 00 ori r3,r3,512
220: 90 61 00 04 stw r3,4(r1)
224: 90 41 00 08 stw r2,8(r1)
228: 60 00 00 00 nop
22c: 60 00 00 00 nop
230: 60 00 00 00 nop
234: 4b ff ff f4 b 228 <__reserved_vectors+0x28>
238: 60 00 00 00 nop
23c: 60 00 00 00 nop
240: 60 00 00 00 nop
244: 60 00 00 00 nop
248: 60 00 00 00 nop
24c: 60 00 00 00 nop
250: 60 00 00 00 nop
254: 60 00 00 00 nop
258: 60 00 00 00 nop
25c: 60 00 00 00 nop
260: 60 00 00 00 nop
264: 60 00 00 00 nop
268: 60 00 00 00 nop
26c: 60 00 00 00 nop
270: 60 00 00 00 nop
274: 60 00 00 00 nop
278: 60 00 00 00 nop
27c: 60 00 00 00 nop
280: 60 00 00 00 nop
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