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Re: PCI Ethernet card (DHCP issue)


On Wed, Sep 17, 2003 at 05:52:08AM +0000, Michael Anburaj wrote:
> Hi,
> 
> Thanks to Andrew & Eric.
> 
> The problem was with the atlas pci definitions.
> 
> HAL_PCI_TRANSLATE_INTERRUPT() macro of plf_io.h was not complete. I fixed 
> it & the eth interface works fine now. I will send the patch for it soon.
> 
> 
> Questions:
> 1. The ethereal debug info showed the following:
> 	From MIPS board: DHCP discover
> 	From MIPS board: DHCP discover
> 	From MIPS board: DHCP discover
> 	From MIPS board: DHCP discover
> 	From RH9 host: DHCP Offer
> 	From RH9 host: DHCP Offer
> 	From RH9 host: DHCP Offer
> 	From RH9 host: DHCP Offer
> 
> 
> This got me confused. It looked like the host was not responding for some 
> reason. But, actually the MIPS board was dropping packets, because of the 
> PCI INT vector setting. The above ethereal info does not make sense to me.

It does seem wrong. Are you running Ethereal on the RH9 server or some
other machine? I've know M$ boxes get packets out of order when used
with tcpdump. 

> 
> I feel it must have been like this,
> 
> 	From MIPS board: DHCP discover
> 	From RH9 host: DHCP Offer <dropped by MIPS board due to INT vector 
> 	issue>
> 	From MIPS board: DHCP discover
> 	From RH9 host: DHCP Offer <dropped by MIPS board due to INT vector 
> 	issue>
> 	From MIPS board: DHCP discover
> 	From RH9 host: DHCP Offer <dropped by MIPS board due to INT vector 
> 	issue>
> 	From MIPS board: DHCP discover
> 	From RH9 host: DHCP Offer <dropped by MIPS board due to INT vector 
> 	issue>

Actually, it might not be that simple. Quite often when the ethernet
driver is requested to send something it also checks the receive queue
and processes anything thats waiting. So you can still sometimes
receive when interrupts are broken. If that is happening, the dhcp
client probably drops the received packets because they are too late.

> 2. The PCI interrupts seems to be mapped in the following manner <My 
> assumption>:
> 
> PCI device number		Interrupt controller PIN
> 0,4,8...				INTC
> 1,5,9...				INTD
> 2,6,10...				INTA
> 3,7,11...				INTB
> 
> Is this right? Let me know how to know this & is there any material 
> regarding this?

I beleave there is a defacto standard, but i've known hardware get it
wrong. You need to look at the documentation for your specific board.

       Andrew

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