[ECOS] please help on memory layout and other questions.

["Ka Chun, Cheng" <kccheng at biblecrawler dot com>]

hello
  I'm working on a PXA 263 board and have some stupid questions, please give
me some hints.
thanks in advance.

flash : 263 internal 32MByte, physical 0x00000000
ram  : external bank 0, 64M physical 0xA0000000
serial: FFUART

I copied uE250 to another folder, renamed the files, removed PCI/VGA/IDE
support stuff, adjusted memory setting and GPIO directions/alternate
functions. compile fine.
and then, nothing shown on serial port, cpu doesn't draw much current.,

so I played around with the ldi, mlt files. now the cpu draw current, GPIO
alternate function is correct(I can see 32k and 3.6M clock coming out as
expected. so i guess the hal_platform)_setup is running.

now the board is hang somewhere, due to incorrect memory layout setting or
something else.

now my basic stupid questions come:

1: how can make a dead loop in the code, showing debug info in leds...?
in hal_platform_setup.h,
deadloop:
b deadloop
seems make the program loop, but no output in LED.........? I'm new to arm
and not familiar with arm asm.
does a label in header file make sense?

2:direct write to serial port, other then standard 16550 registers and
GPIOAF, PSSR, what else need to be done to make serial port active?

3: I'm not sure if my memory layout is correct..
part of sp263_misc.c
I removed pci/ide/vga related map only..

#define _RWRW     ARM_ACCESS_PERM_RW_RW
    X_ARM_MMU_SECTION(0x000,  0x500,    32,  _CACHED,     _BUF, _RWRW); /*
Boot flash ROMspace */
    X_ARM_MMU_SECTION(0xA00,  0x000,    64,  _CACHED,     _BUF, _RWRW); /*
DRAM Bank 0 */
    X_ARM_MMU_SECTION(0xA00,  0xC00,    64,  _UNCACHED,   _BUF, _RWRW); /*
DRAM Bank 0 */
    X_ARM_MMU_SECTION(0xE00,  0xE00,   128,  _CACHED,     _BUF, _RWRW); /*
Zeros (Cache Clean) Bank */
    X_ARM_MMU_SECTION(0x400,  0x400,    64,  _UNCACHED, _NOBUF, _RWRW); /*
Peripheral Registers */
    X_ARM_MMU_SECTION(0x440,  0x440,    64,  _UNCACHED, _NOBUF, _RWRW); /*
LCD Registers */
    X_ARM_MMU_SECTION(0x480,  0x480,    64,  _UNCACHED, _NOBUF, _RWRW); /*
Memory Ctl Registers */
    }


mlt_arm_xscale_sp263_rom.ldi
// eCos memory layout - Tue Jul 02 10:03:04 2002

// This is a generated file - do not edit

#include <cyg/infra/cyg_type.inc>

MEMORY
{
    ram : ORIGIN = 0xA0000000, LENGTH = 0x04000000
    rom : ORIGIN = 0x00000000, LENGTH = 0x02000000
}

SECTIONS
{
    SECTIONS_BEGIN
    SECTION_rom_vectors (rom, 0x00000000, LMA_EQ_VMA)
    SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_mmu_tables (rom, ALIGN (0x4000), LMA_EQ_VMA)
    SECTION_fixed_vectors (rom, 0x20, LMA_EQ_VMA)
    SECTION_data (ram, 0xA000A000, FOLLOWING (.mmu_tables))
    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
    SECTIONS_END
}


mlt_arm_xscale_sp263_rom.mlt
version 0
region ram a0000000 4000000 0 !
region rom 00000000 2000000 1 !
section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !
section data 0 1 1 1 1 1 0 0 8000 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
section rom_vectors 0 1 0 1 1 1 1 1 00000000 00000000 text text !
section text 0 4 0 1 0 1 0 1 fini fini !
section fini 0 4 0 1 0 1 0 1 rodata rodata !
section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 4 0 1 0 1 0 1 fixup fixup !
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 0 1 0 1 0 1 mmu_tables mmu_tables !
section mmu_tables 0 4000 0 1 0 0 0 1 data !



--------------------------------
kccheng
www.kachun.com


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