RE: [ECOS] Re: Fwd: RealTek 8139 ethernet driver

[Gary Thomas <gary at mlbassoc dot com>]

On Mon, 2003-08-11 at 13:22, Andy Dyer wrote:
> I am working on trying out your realtek driver on my hardware,
> but I think I've found a problem.  On my board the NIC is not
> initialized or activated by anything else (no BIOS or HAL init is
> done), so when the pci_device_info structure is returned, it looks
> like this:
> 
> (gdb) p/x pci_device_info
> $11 = {devid = 0x5800, vendor = 0x10ec, device = 0x8139, command = 0x0,
>   status = 0x280, class_rev = 0x2000010, cache_line_size = 0x0,
>   latency_timer = 0x0, header_type = 0x0, bist = 0x0, base_address =
> {0x1,
>     0x0, 0x0, 0x0, 0x0, 0x0}, num_bars = 0x2, base_size = {0xffffff01,
>     0xffffff00, 0x0, 0x0, 0x0, 0x0}, base_map = {0xffffffff, 0xffffffff,
>     0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff}, hal_vector = 0x0,
>   header = {normal = {cardbus_cis = 0x0, sub_vendor = 0x10ec, sub_id =
> 0x8139,
>       rom_address = 0x0, cap_list = 0x0, reserved1 = {0x0, 0x0, 0x0,
> 0x0, 0x0,
>         0x0, 0x0}, int_line = 0xff, int_pin = 0x1, min_gnt = 0x20,
>       max_lat = 0x40}, bridge = {pri_bus = 0x0, sec_bus = 0x0, sub_bus =
> 0x0,
>       sec_latency_timer = 0x0, io_base = 0xec, io_limit = 0x10,
>       sec_status = 0x8139, mem_base = 0x0, mem_limit = 0x0,
>       prefetch_base = 0x0, prefetch_limit = 0x0, prefetch_base_upper32 =
> 0x0,
>       prefetch_limit_upper32 = 0x402001ff, io_base_upper16 = 0x0,
>       io_limit_upper16 = 0x0, reserved1 = {0x0, 0x0, 0x0, 0x0},
>       rom_address = 0x0, int_line = 0x0, int_pin = 0x0, control = 0x0},
>     cardbus_bridge = <optimized out or zero length>}}
> 
> then the code uses pci_device_info->base_map[0] to set the base address
> and reads some regs which gives me a SIGSEGV and dumps into gdb.
> 
> 
> I think what's missing in your driver is a call to
> cyg_pci_configure_device()
> to get BARs allocated in pci space.  I haven't tried it yet :-)

I disagree - that call is not the responsibility of the driver.
It's up to the HAL initialization to call the PCI layer and cause
it to configure devices, busses, etc.

What platform are you using?

-- 
Gary Thomas <gary@mlbassoc.com>
MLB Associates


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