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Re: FIQ for RTC on ARM core ?


I think there is a bug in FIQ handler in file vectors.S.
In FIQ mode, there are 7 banked registers from R8 to R14.
But in the code which FIQ hander is defined, it pushes  fp(R11) and ip(R12)
into the stack, which is intended to save registers for Supervisor mode.
However they are not supervisor mode registers but FIQ registers.
So, if you want to use FIQ, fix this bug.

I sent this bug list to ecos-discuss group.
Please, Wait a moment for reply from ecos group.

----- Original Message ----- 
º¸³½ »ç¶÷: "Koh" <koh@bdtel.com>
¹Þ´Â »ç¶÷: <ecos-discuss@sources.redhat.com>
º¸³½ ³¯Â¥: 2000³â 11¿ù 24ÀÏ ¿ÀÀü 10:50
Á¦¸ñ: [ECOS] FIQ for RTC on ARM core ?


> Hi All
> I am porting eCos on my target which has a variant ARM60 core.
> I have built GDB stub ROM  successfully. So I can download a RAM application
> (ex. Hello world) to my target.  A Problem is happend.  Starting program is
> OK. but Program is halted at the first tick.
> My target isn't support IRQ. So I use FIQ for timer(RTC).
> I am not sure that eCos kernel support FIQ  while schedulling.
> Are there anyone that used FIQ for RTC on ARM core ?
> If ARM HAL chaned, what is changed ?
> 
> 
> 
> 

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