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RE: AEB-1 RAM extendable?


>>>>> "Andreas" 

> == Andreas Karlsson <Andreas.Karlsson@combitechsystems.com> writes:

> 

> Andreas> #define CYGMEM_REGION_ram (0) #define CYGMEM_REGION_ram_SIZE

> Andreas> (0x48000)

> 

> Andreas> I have to change this as well in mlt_arm_aebC_ram.h?

> 

> Take a wild guess :)   Make that guess 'yes' and also note that the

> heap1 size needs adjusting (check the latest CVS snapshot - or

> possibly the next release).

> 

> Jesper



When doing this upgrade I must use other chip selects than the old modules
use. This means that I have to set the proper values in the segments BCR
(Bank Control)



If I make use of just my new 1MB memory (not the old 256 KB)I think it
should look something like this. Any hints on how to make use of both the
old and the new memory, is the assembler in PLATFORM_SETUP1 in
hal_platform_setup.h the key?

You never define BCR2?

#define AEB_SRAM .long
0xFFFFA00C,0x00008000,0x00108000,0x00007808//Segment3,1MB,no cache

#define AEB_BCR3 ((volatile char *)0xFFFFA10C) 0xF090//CE2 and CE3

#define AEB_BAD  .long
0xFFFFA010,0x00108000,0x01000000,0x00000000//Segment4



The old settings look like this

// FIXME: There is a cache problem of some sort. Either eCos or the

// chip. Leave cache disabled till I find the time to fix it. Jesper

#define AEB_SRAM .long
0xFFFFA008,0x00008000,0x00048000,0x00007804//Segment2

#define AEB_BAD  .long
0xFFFFA00C,0x00048000,0x01000000,0x00000000//Segment3

 

brgds

Andreas

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