This is the mail archive of the ecos-discuss@sources.redhat.com mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: Fw: How to access PCI memory(HELP)....


"Ling Su" <lingsu@palmmicro.com> writes:

> Nick,
> 
> I think I understand what Nick means, because 0x8000_0000 maps to
> 0xC000_0000, I should use 0x9000_0000 mapping to 0xD000_0000. Acutally last
> time, I made a mistake, I changed HAL_PCI_ALLOC_BASE_MEMORY to 0x0900_0000,
> not 0x9000_0000. So the result is,
> ----------------------------------------------------------------------------
> ----------
> BAR[0]    0x09000000 / probed size 0xFFF00000 / CPU addr 0xD9000000
> ----------------------------------------------------------------------------
> ----------
> 
> If I correct this mistake, I find
> ----------------------------------------------------------------------------
> ----------
> BAR[0]    0x90000000 / probed size 0xFFF00000 / CPU addr 0x60000000
> ----------------------------------------------------------------------------
> ----------
> 
> The CPU address 0x6000_0000 is 0xD000_0000 + 0x9000_0000 = 0x6000_0000, so
> there is a bug for "cyg_pci_allocate_memory_priv" in pci1.c,
>     dev_info->base_map[bar] = (cyg_unit32)
> (aligned_addr+HAL_PHYSICAL_MEMORY_BASE) &0xFFFFFFFF
> 
> where the aligned_addr = (*base+size-1) & ~(size - 1);
> 
> *base is set to HAL_PCI_ALLOC_BASE_MEMORY as default, if I set
> HAL_PCI_ALLOC_BASE_MEMORY will be added on HAL_PHYSICAL_MEMORY_BASE for
> base_map. so it is not what I supposed, is that any understanding problem? I
> don't know what is the exact meaning for "HAL_PCI_ALLOC_BASE_MEMORY" and
> "HAL_PHYSICAL_MEMORY_BASE ", if what I think is true, I will change
> dev_info->base_map[bar] to
>     (cyg_unit32) (aligned_addr + HAL_PHYSICAL_MEMORY_BASE -
> HAL_PCI_ALLOC_BASE_MEMORY) &0xFFFFFFFF
>

Yes that might work. I'll have to think about it.


> Any suggestion, let me know, I will try this way first tomorrow.
> 

I responded to your previous message before I saw this one. As I said
there, I think that adjusting HAL_PHYSICAL_MEMORY_BASE so that the CPU
addr ends up at 0xD000_0000 will fix your problem.

I guess HAL_PHYSICAL_MEMORY_BASE is probably misnamed, it should
really be HAL_PHYSICAL_MEMORY_OFFSET. It only works as a base when the
PCI memory allocation starts at zero.

-- 
Nick Garnett, eCos Kernel Architect
Red Hat, Cambridge, UK


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]