Re: [ECOS] IRQ interrupt at highest priority

["Amlan Chakraborty" <amlan dot cha at wipro dot com>]

Jesper Skov wrote:

> >>>>> "Amlan" == Amlan Chakraborty <amlan.cha@wipro.com> writes:
>
> Amlan> I want my IRQ interrupt handler (attached to a specific
> Amlan> hardware interrupt) at the highest priority.
>
> Amlan> Infact when ecos is using some of the harware interrupts (like
> Amlan> TIMER2 for RTC) for scheduling and other work it should catch
> Amlan> my interrupt and not miss it.
>
> Amlan> I found in file clock.cxx ,the interrupt for RTC is created
> Amlan> with priority 1.Is any other interrupt created by the OS with
> Amlan> higher priority (i.e. 0)? If I create an interrupt with
> Amlan> priority 0 will it serve the purpose?
>
> If you attach an ISR to some other vector than TIMER2, a TIMER2
> interrupt will not cause it to be executed, regardless of its
> priority.
>
> If you try to attach it to TIMER2, it will probably fail since that
> vector is already in use for the real-time clock ISR. In other words,
> if you attach an ISR to a vector, it is the only ISR on that vector
> and you need not be concerned that some other ISR gets the interrupt
> before your ISR.
>
> The exception is when you configure with interrupt chaining. In this
> case it's possible to register more than one ISR with on the same
> vector. In this case the ISRs must be careful only to return HANDLED
> if they actually an interrupt. See Cyg_Interrupt::chain_isr for
> the sematic details.
>
> There is yet an exception, come to think of it: if a vector is used
> for more than one interrupt source, you may want to write an arbiter
> which will either perform further interrupt decoding to determine the
> actual interrupt source and call the appropriate ISR, or simply call
> all possible related ISRs in the same fashion as the chaining_isr. See
> hal/powerpc/mpc8xx/.../src/var_intr.c for an example of an interrupt
> arbiter.
>
> Jesper

Hi

Thanx for the prompt response. I am extremely sorry
for not being explicit. Specifically my queries are:

1) Will a lower priority interrupt under execution  get
pre-empted when a higher priority interrupt arrives?

2) I found in file packages/kernel/.../src/common/clock.cxx ,
the TIMER2 interrupt for the real-time clock ISR is created
with priority 1 ( not the highest priority ). Hence when the
real-time clock ISR is under execution will an interrupt of
higher priority (say 0) pre-empt it?

3) Does ECOS internally use any other interrupt that is created
with the highest priority (i.e. 0)?

Regards Amlan