This is the mail archive of the ecos-bugs@sourceware.org mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug 1001872] New: TWR-ADCDAC-LTC hal support


Please do not reply to this email, use the link below.

http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001872

            Bug ID: 1001872
           Summary: TWR-ADCDAC-LTC hal support
           Product: eCos
           Version: CVS
            Target: freescale_twr_k70f120m (Freescale Kinetis TWR-K70F120M
                    board)
  Architecture/Host Cortex-M
                OS:
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: low
         Component: ADC
          Assignee: unassigned@bugs.ecos.sourceware.org
          Reporter: mjones@linear.com
                CC: ecos-bugs@ecos.sourceware.org

This patch add supports for the TWR-ADCDAC-LTC board for the K70F120M. It
should work on other versions if the driver is added to them as long as the
GPIOs use the same pins.

This patch is not ready for a commit, but it is fully working. I need some
feedback on a few things:

1) There are new calls in the io/adc package to support gain, polarity, and
mode, where mode is single vs. differential. The io/adc as is was designed for
ADCs internal to a target. All the existing ADC hal support has dummy functions
for these three new API.

2) The LTC ADC support requires use of SPI. This means the reading of values
was moved from the ISR to the DSR. The add sample routine in io/adc returns a
value that indicates the DSR is required. The origonal author of io/adc may or
may not want to change the defined return value to be more generic.

3) Timing is controlled by FTM or PDB at the users choice. PDB is also used for
internal ADCs of the kinetis (future). Someone may care about the impact on
adding future ADC support for the internal ADC. The code uses the interrupt and
should be compatible with future ADC support other than restrictions on the
clock rate that internal and external ADC rely on.

4) The driver was structured similar to the DSPI flash driver in terms of where
things we located in the tree. Someone with more experience may want to look at
the directory and CDL structure and see if it is ok.

5) I will eventually support the DACs on the LTC board, but want to keep it
seperate. I will probably make the DACs a simple poke API and will not use the
clocks. So releasing seperatly should be ok.

6) I have some example code if anyone has the LTC board and wants to play with
it.

7) There are new defines for PDB and FTM. Someone may want to look at these and
see if they are ok with them in terms of future use. I have printed them along
with a datasheet and verified every value, so they should be accurate.

8) There are some #defines in the code that enable/disable behavior. People may
want to remove these or control them with CDL. Looking for opinions.

In summary, even if you don't have a board, this could use a quick review by
those with knowledge of the io/adc and Kinetis support.

-- 
You are receiving this mail because:
You are the assignee for the bug.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]