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[Bug 1001456] HAL misses Interrupt Clear-Pending Registers handling:wasted processing power
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: unassigned at bugs dot ecos dot sourceware dot org
- Date: Tue, 24 Jan 2012 16:10:59 +0000
- Subject: [Bug 1001456] HAL misses Interrupt Clear-Pending Registers handling:wasted processing power
- Auto-submitted: auto-generated
- References: <bug-1001456-777@http.bugs.ecos.sourceware.org/>
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--- Comment #2 from Bernard Fouchà <bernard.fouche@kuantic.com> 2012-01-24 16:10:54 GMT ---
Some ASCII art to try to better explain the issue:
HW | E1 E2
---|----------------------------
ISR| I1 I2
---|----------------------------
DSR| D1 D2
E1: a 1st event occurs
I1: ISR related to E1 triggered, ISR masks interrupt and asks
for a DSR run.
E2: a 2nd event occurs but since interrupt is masked, pending
interrupt register bit is set and ISR is not run.
D1: DSR processes everything it can (for instance it empties a RX
FIFO). DSR unmasks interrupt at the end of processing.
I2: because E2 occurred while interrupt was masked and since
pending interrupt bit is set, I2 now occurs.
D2: DSR runs, and find no work to do because D1 did all the work.
In this example, there were 1 ISR (I2) and 1 DSR (D2) that ran for
nothing.
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