Re: powerpc 860 and glibc sysdeps/powerpc/power3/memset.S: CPU15 "dcbX" errata

[Nye Liu <nyet at mrv dot com>]

On Wed, Oct 22, 2008 at 02:24:34PM -0700, Nye Liu wrote:
> On Mon, Oct 20, 2008 at 11:52:32PM -0700, nyet wrote:
> > I am working on a powerpc 860 toolchain, but I am having problems  
> > convincing glibc to not emit code that uses the dcbz instruction (CPU15  
> > dcbX bug). The source of the problem is sysdeps/powerpc/power3/memset.S
> >
> > in crosstool, we had something like this:
> >
> > Index: crosstool.sh
> > ===================================================================
> > --- crosstool.sh	(.../vendor/crosstool/current)	(revision 6652)
> > +++ crosstool.sh	(.../trunk/tools/crosstool)	(revision 6652)
> > @@ -529,6 +529,11 @@
> > 	export libc_cv_forced_unwind libc_cv_c_cleanup
> >     fi
> >
> > +    case ${TARGET} in
> > +       # remove inline asm powerpc memset, which is broken for 8xx
> > +        powerpc-8* ) rm -f ${GLIBC_DIR}/sysdeps/powerpc/powerpc32/memset.S ;;
> > +    esac
> > +
> >     BUILD_CC=gcc CFLAGS="$TARGET_CFLAGS $EXTRA_TARGET_CFLAGS" CC="${TARGET}-gcc $GLIBC_EXTRA_CC_ARGS" \
> >     AR=${TARGET}-ar RANLIB=${TARGET}-ranlib \
> >         ${GLIBC_DIR}/configure --prefix=/usr \
> >
> > but i dont know what the proper place is to put the equivalent in crosstool-ng
> >
> > see also my crosstool patch here
> >
> > http://sourceware.org/ml/crossgcc/2006-12/msg00057.html
> >
> > and a discussion of the CPU15 errata here
> >
> > http://mlblog.osdir.com/linux.ports.ppc.embedded/2005-04/index.shtml
> >
> > It is worth noting that according to freescale, dcbi, dcibst, dcbf, and  
> > icbi are similarly affected, whch means  
> > sysdeps/powerpc/powerpc32/dl-machine.c might also cause problems, since  
> > it uses dcbst and icbi.
> >
> > the glibc maintainers seem aware of the problem, but don't seem to think  
> > anybody uses glibc with the 860 series. wolfgang denk is also apparently  
> > doing his own workarounds for the toolchains he builds for eldk.
> >
> 
> This is what i ended up with. I have no idea if there is a better way;
> I'd rather fix this up in a glibc patch but the way sysdeps works is
> beyond my knowledge.

Here is a patch to memset.S, but what is the recommended way to make
this happen? Add "-DBROKEN_PPC_8xx_CPU15" to CT_LIBC_GLIBC_EXTRA_CFLAGS
in my config? Or is there better way?

Index: patches/glibc/2.7/290-powerpc-8xx-CPU15-errata.patch
===================================================================
--- patches/glibc/2.7/290-powerpc-8xx-CPU15-errata.patch	(revision 0)
+++ patches/glibc/2.7/290-powerpc-8xx-CPU15-errata.patch	(revision 0)
@@ -0,0 +1,32 @@
+--- glibc-2.7/sysdeps/powerpc/powerpc32/memset.S	2007-03-26 13:09:07.000000000 -0700
++++ glibc-2.7/sysdeps/powerpc/powerpc32/memset.S.new	2008-10-23 12:20:04.000000000 -0700
+@@ -112,11 +112,13 @@
+ 	clrrwi.	rALIGN, rLEN, 5
+ 	mtcrf	0x01, rLEN	/* 40th instruction from .align */
+ 
++#ifndef BROKEN_PPC_8xx_CPU15
+ /* Check if we can use the special case for clearing memory using dcbz.
+    This requires that we know the correct cache line size for this
+    processor.  Getting the __cache_line_size may require establishing GOT
+    addressability, so branch out of line to set this up.  */
+ 	beq	cr1, L(checklinesize)
++#endif
+ 
+ /* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary.
+    Can't assume that rCHR is zero or that the cache line size is either
+@@ -248,6 +250,7 @@
+ 	stw	rCHR, -8(rMEMP)
+ 	blr
+ 
++#ifndef BROKEN_PPC_8xx_CPU15
+ L(checklinesize):
+ #ifdef SHARED
+ 	mflr	rTMP
+@@ -329,6 +332,7 @@
+ L(handletail32):
+ 	clrrwi.	rALIGN, rLEN, 5
+ 	b	L(nondcbz)
++#endif /* ! BROKEN_PPC_8xx_CPU15 */
+ 
+ END (BP_SYM (memset))
+ libc_hidden_builtin_def (memset)

-- 
Nye Liu
nliu@mrv.com
(818) 772-6235x248
(818) 772-0576 fax

"Who would be stupid enough to quote a fictitious character?"
	-- Don Quixote

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