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gcc modifications for arm

From: "eugen (sent by Nabble.com)" <lists at nabble dot com>
To: crossgcc at sources dot redhat dot com
Date: Wed, 14 Jun 2006 08:28:21 -0700 (PDT)
Subject: gcc modifications for arm
Reply-to: eugen <e_leontie at yahoo dot com>

I need to make the following change to gcc:
 - Once every assembler 7 instructions , I need to generate a nop. ( for
each cache block).
Inserting the nops in the asm code does not work, because will cause some
offets to go out of range. Inserting the nops in the rtl list can only be
done before the dataflow analysis step for the same reason.
I also do not know how to keep the final statically linked code well
alligned.

Can anyone help ? any suggestions would be appreciated.

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