ldrb vs ldrh in gcc-3.4.4 (ARM)

[Steven Scholz <steven dot scholz at imc-berlin dot de>]

Hi there,

I noticed that gcc-3.4.4 for ARM is using byte wise loading instructions 
although word wise would be much better. Does anyone know why? gcc-3.3.3 is 
doing it as I would expect.

Please have a look at this trivial program:

unsigned short data[] = {0,1,2,3,4,5,6,7,8,9,10};

int main(void)
{
        unsigned short value;

        value = data[0];

        return (int) value;
}

----------------

gcc-3.3.3 correctly creates

        value = data[0];
    847c:       e59f3010        ldr     r3, [pc, #16]   ; 8494 <.text+0x128>
    8480:       e1d330b0        ldrh    r3, [r3]
    8484:       e14b30be        strh    r3, [fp, #-14]


But gcc-3.4.4 creates

       value = data[0];
    8470:       e59f302c        ldr     r3, [pc, #44]   ; 84a4 <.text+0x138>
    8474:       e5d32000        ldrb    r2, [r3]
    8478:       e5d33001        ldrb    r3, [r3, #1]
    847c:       e1823403        orr     r3, r2, r3, lsl #8
    8480:       e54b300e        strb    r3, [fp, #-14]
    8484:       e1a03443        mov     r3, r3, asr #8
    8488:       e54b300d        strb    r3, [fp, #-13]

And I don't understand why he is using two ldrb instructions!
Both compilers were called with "-g -O0" Using -O3 creates smaller code but 
still uses ldrb.

This is serious for me. It does not only influences speed but breaks direct 
accesses to memory mapped 16bit hardware registers!

PS: When value and data are "unsigned long" then both compilers use "ldr" which 
is correct.

Thanks for any hints!

--
Steven


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