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In litte-endian mode, gcc-3.0.3 built for ARM makes an unaligned access to a bitfield in a packed structure in fp-bit.c:unpack_d. FLOAT_BIT_ORDER_MISMATCH is defined in this case. This happens with -O2 or without. How can this be fixed in a general way? #ifdef FLOAT_BIT_ORDER_MISMATCH fraction = src->bits.fraction; exp = src->bits.exp; sign = src->bits.sign; #else fraction = src->value_raw & ((((fractype)1) << FRACBITS) - (fractype)1); exp = ((int)(src->value_raw >> FRACBITS)) & ((1 << EXPBITS) - 1); sign = ((int)(src->value_raw >> (FRACBITS + EXPBITS))) & 1; #endif Crash happens at address 1e740: 0001e6e8 <___unpack_d>: 1e6e8: e1a0c00d mov ip, sp 1e6ec: e92dd810 stmdb sp!, {r4, fp, ip, lr, pc} 1e6f0: e24cb004 sub fp, ip, #4 ; 0x4 1e6f4: e24dd028 sub sp, sp, #40 ; 0x28 1e6f8: e50b0014 str r0, [fp, -#20] 1e6fc: e50b1018 str r1, [fp, -#24] 1e700: e51b3014 ldr r3, [fp, -#20] 1e704: e5933004 ldr r3, [r3, #4] 1e708: e50b3030 str r3, [fp, -#48] 1e70c: e51b3014 ldr r3, [fp, -#20] 1e710: e5933000 ldr r3, [r3] 1e714: e50b302c str r3, [fp, -#44] 1e718: e24b3030 sub r3, fp, #48 ; 0x30 1e71c: e50b3014 str r3, [fp, -#20] 1e720: e24b1020 sub r1, fp, #32 ; 0x20 1e724: e51b2014 ldr r2, [fp, -#20] 1e728: e5923000 ldr r3, [r2] 1e72c: e5922004 ldr r2, [r2, #4] 1e730: e3c244ff bic r4, r2, #-16777216 ; 0xff000000 1e734: e3c4460f bic r4, r4, #15728640 ; 0xf00000 1e738: e8810018 stmia r1, {r3, r4} 1e73c: e51b3014 ldr r3, [fp, -#20] 1e740: e5933006 ldr r3, [r3, #6] ; CRASH! 1e744: e1a03803 mov r3, r3, lsl #16 1e748: e1a03823 mov r3, r3, lsr #16 1e74c: e1a03223 mov r3, r3, lsr #4 1e750: e1a03803 mov r3, r3, lsl #16 1e754: e1a03823 mov r3, r3, lsr #16 1e758: e1a03a83 mov r3, r3, lsl #21 1e75c: e1a03aa3 mov r3, r3, lsr #21 ... ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com
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