Memory mapped registers- WORD Access

[Jensen Mark-WLMJ01 <Mark dot Jensen at motorola dot com>]

Hello all,

I sure hope someone can help.
I building a project based on ARM7TDMI-S, and using arm-elf-gcc

We have a whole lot of memory mapped registers, and they are all defined as
below. The problem is the compiler turns everything into a byte access.
Some of the registers are 32bit access only, so byte access fails.  We
turned off all optimizations as far as we can tell.  ARM's compiler does not
do this.  I can't seem to find the magic that tells arm-elf-gcc that this
must be a 32bit access.

Thanks
Mark
---------------------------------------------------------
#define GPIO_BASE_ADDRESS 0x12345000

/*	GPIO_CR0   DataReg32  */
typedef struct {
    volatile unsigned int UNUSED : 2;
    volatile unsigned int P9 : 3;
    volatile unsigned int P8 : 3;
    volatile unsigned int P7 : 3;
    volatile unsigned int P6 : 3;
    volatile unsigned int P5 : 3;
    volatile unsigned int P4 : 3;
    volatile unsigned int P3 : 3;
    volatile unsigned int P2 : 3;
    volatile unsigned int P1 : 3;
    volatile unsigned int P0 : 3;
}_GPIO_CR0_Bits;

typedef union {
    _GPIO_CR0_Bits bits;
    volatile unsigned int all;
}GPIO_CR0_REG;
	
#define GPIO_CR0 (*(volatile GPIO_CR0_REG *) (GPIO_BASE_ADDRESS))

usage:

GPIO_CR0.all     = 0;
GPIO_CR0.bits.P3 = 7;

if (GPIO.CR0.bits.P2 == 5) {
   // do something
}

------
Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com