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Re: Masking interrupts?
Michael Schwingen wrote:
> On Fri, Jul 02, 1999 at 10:11:28PM -0700, Scott Howard wrote:
> > Try this:
> > asm (" ori.l %1,%0" : "=m" (EZ328_IMR) : "i" (EZ328_INT_UART));
> OK - I also had this problem (also on a M68k), only a bit more difficult: I
> have a structure which maps to some UART hardware registers. Now, I want do
> do this:
> static inline void txint_off(UART *regs)
> #if 0
> regs->ier &= ~TXLDL_IE; /* not atomic :-( */
> asm volatile ("bclr.b #1,1(%0)"
> : : "a" (regs) : "cc");
> The first does not procude atomic code. However, the asm is not very
> maintainable, too: I would like to specify "®s->ier" somehow so that I do
> not have to hardcode the offset for the address register in the asm code,
> but I could not get this to work - all constraints produced some kind of
> invalid asm code, because the '1' may *not* be prefixed by a '#'.
> Any idea?
> Best would be to somehow make gcc produce atomic code in the first place,
> but a working asm without hardcoded offsets would be fine, too.
We've had to resort to asm() in our 68k code to insure atomic
Even (*ptr)++ sometimes generates a single, atomic instruction and
othertimes a load, increment, store sequence.
For your problem, maybe something along the lines of:
static inline void txint_off(UART *regs)
unsigned char *ier_ptr = &(regs->ier);
unsigned char mask = ~TXLDL_IE;
asm volatile ("and.b %0,(%1)" : : "d" (mask), "a" (ier_ptr) : "cc");
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