This is the mail archive of the cgen@sourceware.org mailing list for the CGEN project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: cgen, GNU gdb/sim, and full system simulation


Hi -

On Fri, May 11, 2012 at 01:57:11PM +0200, Peter Gavin wrote:
> [...]
> I'm working on a port of the gdb simulator for OpenRISC.  I was
> wondering if anyone had any input on how difficult a full-system
> simulator would be to implement vs. the syscall emulated simulators
> the other ports seem to use.

Indeed.  For full-system simulators, some projects have used the sid
framework instead of gdb/sim.

> The primary thing I'm concerned about at the moment is virtual
> memory.  [...]  But it doesn't look like there's a way to translate
> the PC prior to fetching an instruction. [...]

Actually, instruction fetching code can be hand-written in either
gdb-sim (see e.g. sim/m32r/mloop.in extract-*) or sid frameworks
(sid/component/cgen-cpu/m32r/m32rbf.cxx step_insns), and so that code
can map all it likes.

To me, the more interesting question would be the choice to model
virtual memory as a separate component between the CPU and the memory
and I/O buses (which would suite sid's modeling very well), vs
something purely internal to the CPU model.  In either case, the
lookup is only one part: page tables, TLBs, page fault events, all
have to be modeled.

- FChE


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]