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Re: variable width instructions
- From: "Frank Ch. Eigler" <fche at redhat dot com>
- To: David Carney <dfcarney at net-itech dot com>
- Cc: cgen at sources dot redhat dot com
- Date: Fri, 20 Dec 2002 21:22:08 -0500
- Subject: Re: variable width instructions
- References: <200212201757.54789.dfcarney@net-itech.com>
Hi -
On Fri, Dec 20, 2002 at 05:57:54PM -0500, David Carney wrote:
> [...]
> My question is: how I should go about defining the instruction fields for
> this architecture? I.e. what value should I use for the "start" fields in
> "(define-ifield ...)" for the msb so that instruction fields are compatible
> for both 16-bit and (the effectively) 32-bit instructions (15 or 31) ?
There is a simple trick ...
> My confusion stems from observing the line:
> (dnf f-i32 "32 bit immediate" (SIGN-OPT) 16 32)
> in fr30.cpu. Doesn't the "16 32" denote that the start of the opcode is at
> bit 16, but the length is 32?
Yes - methinks it's used by 48-bit-long instructions.
The trick is that, for variable-length instruction sets, one should
start numbering bits from the left (opcode) end. (Set lsb0=#f.)
- FChE