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Endian sensitive semantics
- To: cgen development <cgen at sources dot redhat dot com>
- Subject: Endian sensitive semantics
- From: Ben Elliston <bje at redhat dot com>
- Date: Mon, 7 Aug 2000 18:47:02 +1000 (EST)
Hi,
I am trying to describe some load and store instructions that deal with
misaligned addresses. Their semantics depend on the endianness of the cpu.
How should these be dealt with?
I could escape to C to handle this (so that I have the cpu's endianness
available from relevant cpu state records), but I'd prefer to keep
everything written in high level RTL to maintain cross-framework
portability.
Thanks!
Ben