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Re: [PATCH v6 3/5] x86: correct VFPCLASSP{S,D} operand size handling


On Thu, Feb 13, 2020 at 6:47 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 12.02.2020 13:31, H.J. Lu wrote:
> > On Wed, Feb 12, 2020 at 2:05 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>
> >> With AVX512VL disabled (e.g. when writing code for the Knights family
> >> of processors) these insns aren't ambiguous when used with a memory
> >> source, and hence should be accepted without suffix or operand size
> >> specifier. When AVX512VL is enabled, to be consistent with this as
> >> well as other ambiguous operand size handling it would seem better to
> >> just warn about the ambiguity in AT&T mode, and still default to 512-bit
> >> operands (on the assumption that the code may have been written without
> >> AVX512VL in mind yet), but it was requested to leave AT&T syntax mode
> >> alone here.
> >>
> >> gas/
> >> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>
> >>
> >>         * config/tc-i386.c (avx512): New (at file scope), moved from
> >>         (check_VecOperands): ... here.
> >>         (process_suffix): Add [XYZ]MMword operand size handling.
> >>         * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
> >>         * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
> >>         tests.
> >>         * testsuite/gas/i386/avx512dq-inval.l,
> >>         testsuite/gas/i386/noavx512-2.l: Adjust expectations.
> >>
> >> opcodes/
> >> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>
> >>
> >>         * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
> >>         with Unspecified, making the present one AT&T syntax only.
> >>         * i386-tbl.h: Re-generate.
> >
> > OK.
>
> Btw, am I right in understanding that when I was to extend this to
> VCVTPD2PS and alike, you again want me to limit this to Intel syntax
> mode, requiring the X/Y suffix forms to be used instead in AT&T mode?
>

Yes. please only do it for Intel syntax.


-- 
H.J.


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