This is the mail archive of the binutils@sourceware.org mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] S12Z: New 32 bit Reloc.


On Mon, Oct 15, 2018 at 09:29:35AM +0200, John Darrington wrote:
> On Mon, Oct 15, 2018 at 12:21:01PM +1030, Alan Modra wrote:
>      On Fri, Oct 12, 2018 at 02:41:43AM +0200, John Darrington wrote:
>      > Third party tools produce 32 bit relocs  at index 6 with strange properties.
>      > This change moves the existing 32 bit reloc (R_S12Z_EXT32) to index 7
>      > and introduces a new one (R_S12Z_CW32) at index 6 to try to support code
>      > generated by these tools.
>      
>      Do you have an ABI document for s12z?
> 
> No.  So far as I'm aware, no such document exists (that is publically
> available).

That's a pity.

>      Is your goal to be compatible with these "third party tools"?
>      
> It is a secondary goal, yes.  But I don't want that to conflict with
> binutils other tools and/or gcc (if and when gcc targets s12z).

Introducing a new 32-bit absolute reloc of course makes gas generate
objects incompatible with the third party linker and other tools..

It's not impossible to work with RELA relocs that sum symbol + addend
+ contents.  In fact, it's necessary if you want to apply multiple
relocations with cumulative effect on the same location.  You just
need to ensure that the assembler doesn't put the offset from an
expression symbol+offset into both section contents and the relocation
addend, and also that ld -r doesn't modify both contents and addend.

-- 
Alan Modra
Australia Development Lab, IBM


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]