Re: [PATCH v3 5/6] x86: fold various AVX512 templates with so far differing Masking attributes

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Mon, Jul 30, 2018 at 1:45 AM, Jan Beulich <JBeulich@suse.com> wrote:
> There's no insn allowing ZEROING_MASKING alone. Re-purpose its value for
> handling the not uncommon case of insns allowing either form of masking
> with register operands, but only merging masking with a memory operand.
>
> gas/
> 2018-07-30  Jan Beulich  <jbeulich@suse.com>
>
>         * config/tc-i386.c (check_VecOperands): Convert masking handling
>         to switch(), to deal with DYNAMIC_MASKING.
>
> opcodes/
> 2018-07-30  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-opc.h (ZEROING_MASKING) Rename to ...
>         (DYNAMIC_MASKING): ... this. Adjust comment.
>         * i386-opc.tbl (MaskingMorZ): Define.
>         (vcompresspd, vcompressps, vcvtps2ph, vextractf32x4,
>         vextractf32x8, vextractf64x2, vextractf64x4, vextracti32x4,
>         vextracti32x8, vextracti64x2, vextracti64x4, vmovapd, vmovaps,
>         vmovdqa32, vmovdqa64, vmovdqu8, vmovdqu16, vmovdqu32, vmovdqu64,
>         vmovupd, vmovups, vpcompressb, vpcompressw, vpcompressd,
>         vpcompressq, vpmovdb, vpmovdw, vpmovqb, vpmovqd, vpmovqw,
>         vpmovsdb, vpmovsdw, vpmovsqb, vpmovsqd, vpmovsqw, vpmovswb,
>         vpmovusdb, vpmovusdw, vpmovusqb, vpmovusqd, vpmovusqw,
>         vpmovuswb, vpmovwb): Fold AVX512 register and memory forms.

OK.

Thanks.



-- 
H.J.