This is the mail archive of the binutils@sourceware.org mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH] x86: don't wrongly scale non-8-bit displacements


In commit b5014f7af2 I've removed (instead of replaced) a conditional,
resulting in addressing forms not allowing 8-bit displacements to now
get their displacements scaled under certain circumstances. Re-add the
missing conditional.

gas/
2018-07-30  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (output_disp): Restrict scaling.
	* testsuite/gas/i386/evex-no-scale.s,
	  testsuite/gas/i386/evex-no-scale-32.d
	  testsuite/gas/i386/evex-no-scale-64.d: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7965,7 +7965,8 @@ output_disp (fragS *insn_start_frag, off
 	      int size = disp_size (n);
 	      offsetT val = i.op[n].disps->X_add_number;
 
-	      val = offset_in_range (val >> i.memshift, size);
+	      val = offset_in_range (val >> (size == 1 ? i.memshift : 0),
+				     size);
 	      p = frag_more (size);
 	      md_number_to_chars (p, val, size);
 	    }
--- /dev/null
+++ b/gas/testsuite/gas/i386/evex-no-scale-32.d
@@ -0,0 +1,13 @@
+#source: evex-no-scale.s
+#objdump: -dw
+#name: ix86 EVEX no disp scaling
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <disp>:
+ +[a-f0-9]+:	62 f1 7c 48 28 04 05 40 00 00 00 	vmovaps 0x40\(,%eax,1\),%zmm0
+ +[a-f0-9]+:	62 f1 7c 48 28 04 25 40 00 00 00 	vmovaps 0x40\(,%eiz,1\),%zmm0
+ +[a-f0-9]+:	62 f1 7c 48 28 05 40 00 00 00 	vmovaps 0x40,%zmm0
+ +[a-f0-9]+:	67 62 f1 7c 48 28 06 40 00 	vmovaps 0x40,%zmm0
--- /dev/null
+++ b/gas/testsuite/gas/i386/evex-no-scale-64.d
@@ -0,0 +1,15 @@
+#source: evex-no-scale.s
+#objdump: -dw
+#name: x86-64 EVEX no disp scaling
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <disp>:
+ +[a-f0-9]+:	62 f1 7c 48 28 05 00 fc ff ff 	vmovaps -0x400\(%rip\),%zmm0        # .*
+ +[a-f0-9]+:	62 f1 7c 48 28 04 05 40 00 00 00 	vmovaps 0x40\(,%rax,1\),%zmm0
+ +[a-f0-9]+:	62 f1 7c 48 28 04 25 40 00 00 00 	vmovaps 0x40,%zmm0
+ +[a-f0-9]+:	67 62 f1 7c 48 28 04 05 40 00 00 00 	vmovaps 0x40\(,%eax,1\),%zmm0
+ +[a-f0-9]+:	67 62 f1 7c 48 28 04 25 40 00 00 00 	addr32 vmovaps 0x40,%zmm0
+ +[a-f0-9]+:	62 f1 7c 48 28 04 25 40 00 00 00 	vmovaps 0x40,%zmm0
--- /dev/null
+++ b/gas/testsuite/gas/i386/evex-no-scale.s
@@ -0,0 +1,19 @@
+	.allow_index_reg
+	.section .probe, "", @progbits
+.Lprobe_64bit:
+	inc	%eax
+.equiv is_64bit, (. - .Lprobe_64bit) / 2
+
+	.text
+disp:
+.if is_64bit
+	vmovaps	-1024(%rip), %zmm0
+	vmovaps	64(,%rax), %zmm0
+	vmovaps	64(,%riz), %zmm0
+.endif
+	vmovaps	64(,%eax), %zmm0
+	vmovaps	64(,%eiz), %zmm0
+	vmovaps	64, %zmm0
+.if !is_64bit
+	addr16 vmovaps 64, %zmm0
+.endif
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -224,6 +224,7 @@ if [expr ([istarget "i*86-*-*"] ||  [ist
     run_dump_test "evex-lig512-intel"
     run_dump_test "evex-wig1"
     run_dump_test "evex-wig1-intel"
+    run_dump_test "evex-no-scale-32"
     run_dump_test "sse2avx"
     run_list_test "inval-avx" "-al"
     run_list_test "inval-avx512f" "-al"
@@ -734,6 +735,7 @@ if [expr ([istarget "i*86-*-*"] || [ista
     run_dump_test "x86-64-evex-lig512-intel"
     run_dump_test "x86-64-evex-wig1"
     run_dump_test "x86-64-evex-wig1-intel"
+    run_dump_test "evex-no-scale-64"
     run_dump_test "x86-64-sse2avx"
     run_list_test "x86-64-inval-avx" "-al"
     run_list_test "x86-64-inval-avx512f" "-al"





Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]