Re: [PATCH] x86: fold various non-memory operand AVX512VL templates

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Wed, Apr 25, 2018 at 7:22 AM, Jan Beulich <JBeulich@suse.com> wrote:
> x86: fold various non-memory operand AVX512VL templates
>
> There's little point carrying up to three templates per insn flavor
> when the sole difference is operand size and the dependency on AVX512VL
> being enabled. Instead the need for AVX512VL can be derived from an
> operand allowing for ZMMword as well as one or both or XMMword and
> YMMword (irrespective of whether this is a register or memory operand).
> Without further abstraction to deal with the different Disp8MemShift
> values between the templates, only a limited set (mostly ones only
> allowing for non-memory operands) can be folded, which is being done
> here.
>
> Also drop IgnoreSize wherever possible from anything that's being
> touched anyway.
>
> gas/
> 2018-04-25  Jan Beulich  <jbeulich@suse.com>
>
>         * config/tc-i386.c (check_VecOperands): Add AVX512VL check. Set
>         .baseindex.
>         (match_template): Don't set suffix_check when Intel syntax and
>         broadcast. Make check_register a per-operand bitmap.
>
> opcodes/
> 2018-04-25  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-opc.tbl: Fold various non-memory operand AVX512VL
>         templates into their base ones.
>         * i386-tlb.h: Re-generate.
>

OK.

Thanks.

H.J.