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[PATCH 2/5] x86: don't recognize bnd<N> as registers without CpuMPX
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Wed, 25 Apr 2018 04:28:41 -0600
- Subject: [PATCH 2/5] x86: don't recognize bnd<N> as registers without CpuMPX
- References: <5AE0566402000078001BE4EA@prv1-mh.provo.novell.com>
This is just like for all other extended/optional register sets.
gas/
2018-04-25 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (parse_real_register): Check bnd<N>
registers.
* testsuite/gas/i386/bnd.s, testsuite/gas/i386/bnd.l: New.
* testsuite/gas/i386/i386.exp: Run new test.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -10170,6 +10170,9 @@ parse_real_register (char *reg_string, c
&& !cpu_arch_flags.bitfield.cpuregmask)
return (const reg_entry *) NULL;
+ if (r->reg_type.bitfield.regbnd && !cpu_arch_flags.bitfield.cpumpx)
+ return (const reg_entry *) NULL;
+
/* Don't allow fake index register unless allow_index_reg isn't 0. */
if (!allow_index_reg
&& (r->reg_num == RegEiz || r->reg_num == RegRiz))
--- /dev/null
+++ b/gas/testsuite/gas/i386/bnd.l
@@ -0,0 +1,12 @@
+.*: Assembler messages:
+.*:6: Error: .*`bndmov'.*
+GAS LISTING .*
+
+
+[ ]*1[ ]+\.text
+[ ]*2[ ]+\.intel_syntax noprefix
+[ ]*3[ ]+\.arch generic32
+[ ]*4[ ]+bnd:
+[ ]*5[ ]+\?\?\?\? A1000000[ ]+mov eax, bnd0
+[ ]*5[ ]+00
+[ ]*6[ ]+bndmov bnd0, bnd0
--- /dev/null
+++ b/gas/testsuite/gas/i386/bnd.s
@@ -0,0 +1,6 @@
+ .text
+ .intel_syntax noprefix
+ .arch generic32
+bnd:
+ mov eax, bnd0
+ bndmov bnd0, bnd0
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -294,6 +294,7 @@ if [expr ([istarget "i*86-*-*"] || [ist
run_list_test "mpx-inval-1" "-al"
run_list_test "mpx-inval-2" "-al"
run_dump_test "mpx-add-bnd-prefix"
+ run_list_test "bnd" "-al"
run_dump_test "sha"
run_dump_test "clflushopt"
run_dump_test "clflushopt-intel"