Re: [PATCH v2] x86-64: always use unsigned 32-bit relocation for 32-bit addressing

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Tue, Nov 14, 2017 at 8:31 AM, Jan Beulich <JBeulich@suse.com> wrote:
> Except for %eip-relative addressing, where we don't have a suitable
> relocation type silently wrapping at the 4G boundary, consistently
> force use of R_X86_64_32 (in ELF terms) instead of its sign-extending
> counterpart. This wasn't right in case there was no base register in
> the addressing expression.
>
> Take the opportunity and also remove a redundant piece of code, which
> otherwise would need to be adjusted too.
> ---
> v2: ld testcase added.
>
> gas/
> 2017-11-14  Jan Beulich  <jbeulich@suse.com>
>

Please add "PR ld/22441" to all ChangeLogs.

> gas/
>         * config/tc-i386.c (build_modrm_byte): Add address override
>         prefix checks alongside 64-bit mode ones.
>         * testsuite/gas/i386/reloc64.s: Add 32-bit signed/unsigned
>         relocation cases.
>         * testsuite/gas/i386/reloc64.d: Adjust expectations.
>
> ld/
> 2017-11-14  Jan Beulich  <jbeulich@suse.com>
>
>         * testsuite/ld-x86-64/apic.{s,d}: New.
>         * testsuite/ld-x86-64/x86-64.exp: Run new test.
>
> --- 2017-11-10/gas/config/tc-i386.c
> +++ 2017-11-10/gas/config/tc-i386.c
> @@ -6565,7 +6565,7 @@ build_modrm_byte (void)
>                   i.types[op].bitfield.disp8 = 0;
>                   i.types[op].bitfield.disp16 = 0;
>                   i.types[op].bitfield.disp64 = 0;
> -                 if (flag_code != CODE_64BIT)
> +                 if (flag_code != CODE_64BIT || i.prefix[ADDR_PREFIX])
>                     {
>                       /* Must be 32 bit */
>                       i.types[op].bitfield.disp32 = 1;
> @@ -6590,13 +6590,7 @@ build_modrm_byte (void)
>             {
>               i.rm.mode = 0;
>               if (!i.disp_operands)
> -               {
> -                 fake_zero_displacement = 1;
> -                 /* Instructions with VSIB byte need 32bit displacement
> -                    if there is no base register.  */
> -                 if (i.tm.opcode_modifier.vecsib)
> -                   i.types[op].bitfield.disp32 = 1;
> -               }
> +               fake_zero_displacement = 1;

Please check in this as a separate patch.

>               if (i.index_reg == 0)
>                 {
>                   gas_assert (!i.tm.opcode_modifier.vecsib);
> @@ -6641,7 +6635,7 @@ build_modrm_byte (void)
>                   i.types[op].bitfield.disp8 = 0;
>                   i.types[op].bitfield.disp16 = 0;
>                   i.types[op].bitfield.disp64 = 0;
> -                 if (flag_code != CODE_64BIT)
> +                 if (flag_code != CODE_64BIT || i.prefix[ADDR_PREFIX])
>                     {
>                       /* Must be 32 bit */
>                       i.types[op].bitfield.disp32 = 1;
> --- 2017-11-10/gas/testsuite/gas/i386/reloc64.d
> +++ 2017-11-10/gas/testsuite/gas/i386/reloc64.d
> @@ -51,6 +51,10 @@ Disassembly of section \.text:
>  .*[    ]+R_X86_64_TPOFF32[     ]+xtrn
>  .*[    ]+R_X86_64_TPOFF32[     ]+xtrn
>  .*[    ]+R_X86_64_GOTPLT64[    ]+xtrn
> +.*[    ]+R_X86_64_32S[         ]+xtrn
> +.*[    ]+R_X86_64_32[  ]+xtrn
> +.*[    ]+R_X86_64_32S[         ]+xtrn
> +.*[    ]+R_X86_64_32[  ]+xtrn
>  Disassembly of section \.data:
>  #...
>  .*[    ]+R_X86_64_64[  ]+xtrn
> --- 2017-11-10/gas/testsuite/gas/i386/reloc64.s
> +++ 2017-11-10/gas/testsuite/gas/i386/reloc64.s
> @@ -218,3 +218,9 @@ bad call    xtrn@gotplt
>  bad    .long   xtrn@gotplt
>  bad    .word   xtrn@gotplt
>  bad    .byte   xtrn@gotplt
> +
> +       .text
> +       mov     xtrn(,%rbx), %eax
> +       mov     xtrn(,%ebx), %eax
> +       vgatherdps %xmm2, xtrn(,%xmm1), %xmm0
> +       addr32 vgatherdps %xmm2, xtrn(,%xmm1), %xmm0
> --- 2017-11-10/ld/testsuite/ld-x86-64/apic.d
> +++ 2017-11-10/ld/testsuite/ld-x86-64/apic.d
> @@ -0,0 +1,9 @@
> +#name: 32-bit relocs w/ index but no base
> +#ld: --defsym APIC_BASE=0xfee00000
> +#objdump: -rs
> +
> +.*:     file format .*
> +
> +Contents of section \.text:
> +[      ][0-9a-f]+ c3678b04 bd0000e0 fec36789 34bd0000 .*
> +[      ][0-9a-f]+ e0fec3.*

Please use "objdump -dw".

> --- 2017-11-10/ld/testsuite/ld-x86-64/apic.s
> +++ 2017-11-10/ld/testsuite/ld-x86-64/apic.s
> @@ -0,0 +1,13 @@
> +       .text
> +       .intel_syntax noprefix
> +       .global _start
> +_start:
> +       ret
> +
> +apic_read:
> +       mov     eax, [edi*4+APIC_BASE]
> +       ret
> +
> +apic_write:
> +       mov     [edi*4+APIC_BASE], esi
> +       ret
> --- 2017-11-10/ld/testsuite/ld-x86-64/x86-64.exp
> +++ 2017-11-10/ld/testsuite/ld-x86-64/x86-64.exp
> @@ -267,6 +267,7 @@ if { ![ld_link $ld tmpdir/$test "-m$emul
>
>  run_dump_test "abs"
>  run_dump_test "abs-l1om"
> +run_dump_test "apic"
>  run_dump_test "pcrel8"
>  run_dump_test "pcrel16"
>  run_dump_test "tlsgd2"
>
>
>

OK with these changes.

Thanks.

-- 
H.J.