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Re: [PATCH 2/3] x86: use correct register names


On Mon, Nov 13, 2017 at 11:31 PM, Jan Beulich <JBeulich@suse.com> wrote:
> VEX.W may be legitimately set (and is then ignored by the CPU) for
> non-64-bit code. Don't print 64-bit register names in such a case, by
> utilizing that REX_W would never be set for non-64-bit code, and that
> it is being set from VEX.W by generic decoding.
>
> A test for this is going to be introduced in the next patch of this
> series.
>
> opcodes/
> 2017-11-14  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-dis.c (OP_VEX, OP_LWPCB_E, OP_LWP_E): Use rex to
>         determine GPR register set.
>
> --- 2017-11-10.orig/opcodes/i386-dis.c  2017-11-13 17:44:05.279694616 +0100
> +++ 2017-11-10/opcodes/i386-dis.c       2017-11-13 17:50:36.342576947 +0100
> @@ -17120,7 +17120,7 @@ OP_VEX (int bytemode, int sizeflag ATTRI
>           names = names_xmm;
>           break;
>         case dq_mode:
> -         if (vex.w)
> +         if (rex & REX_W)
>             names = names64;
>           else
>             names = names32;
> @@ -17704,7 +17704,7 @@ OP_LWPCB_E (int bytemode ATTRIBUTE_UNUSE
>    MODRM_CHECK;
>    codep++;
>
> -  if (vex.w)
> +  if (rex & REX_W)
>      names = names64;
>    else
>      names = names32;
> @@ -17722,7 +17722,7 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED,
>  {
>    const char **names;
>
> -  if (vex.w)
> +  if (rex & REX_W)
>      names = names64;
>    else
>      names = names32;
>
>
>

Please use .byte directive to add 3 testcases for each case to verify
that disassembler
properly ignores this bit.   OK with that change.

Thanks.


-- 
H.J.


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