RISC-V Fixes for 2.28

[Palmer Dabbelt <palmer at dabbelt dot com>]

Sorry we've been quite for a bit: we were really trying to get things right
before submitting another patch set, because once our port is released we're
going to have to support it forever.  We've spent considerable time on the
RISC-V mailing lists trying to get all this right, and we're pretty sure this
patch set provides a good base for the first release of the RISC-V binutils
port.  The goal here is to only have one "flag day", and for that to happen
before there are any releases of any core RISC-V toolchain ports (with binutils
being the first).

In this patch set, there are some small changes and some big changes.  The big
changes are:

 * A reworking of the RISC-V relocations.  With these commits we can properly
   support CFI from GCC (thanks to Kuan-Lin Chen for finding a great
   implementation of this), rather than relying on some GCC hacks to avoid
   linker deficiencies.

 * Changes to the ELF ABI flags and gas/ld arguments.  These changes are
   necessary to allow us to properly support multiple ABIs, including both
   ARM-style floating point (ie, orthogonalizing the calling convention from
   code generation) and x32-style ABIs (though we don't have ilp32-on-rv64g
   working yet).

There's also a few smaller changes, but those are all well described within the
patch set -- they're mostly specific bug fixes or responses to code reviews, so
they're pretty self-contained.  There's a few code review fixes, some
formatting changes, and a handful of assembly fixes.

We really don't want to base our support on what's currently upstream, since
it's not quite extensible enough to maintain reasonable ABI compatibility
forever.  I understand this is a big patch set to be dropping right before a
release is meant to be branched off, so I'll dedicate 100% of my time to
getting all this ready-to-merge until it's good.

[PATCH 1/9] Improve a LD error message when linking elf32 and elf64
[PATCH 2/9] Formatting changes for RISC-V
[PATCH 3/9] Rework RISC-V relocations
[PATCH 4/9] Fix an integer overflow in relocation handling
[PATCH 5/9] Re-work RISC-V gas flags: now we just support -mabi and
[PATCH 6/9] Don't define our own .p2align
[PATCH 7/9] Add canonical JALR assembly representation
[PATCH 8/9] Fix disassembly of CSR instructions under -Mno-aliases
[PATCH 9/9] Correct assembler mnemonic for aqrl AMOs