[AArch64][SVE 09/32] Improve error messages for invalid floats

[Richard Sandiford <richard dot sandiford at arm dot com>]

Previously:

    fmov d0, #2

would give an error:

    Operand 2 should be an integer register

whereas the user probably just forgot to add the ".0" to make:

    fmov d0, #2.0

This patch reports an invalid floating point constant unless the
operand is obviously a register.

The FPIMM8 handling is only relevant for SVE.  Without it:

    fmov z0, z1

would try to parse z1 as an integer immediate zero (the res2 path),
whereas it's more likely that the user forgot the predicate.  This is
tested by the final patch.

OK to install?

Thanks,
Richard


gas/
	* config/tc-aarch64.c (parse_aarch64_imm_float): Report a specific
	low-severity error for registers.
	(parse_operands): Report an invalid floating point constant for
	if parsing an FPIMM8 fails, and if no better error has been
	recorded.
	* testsuite/gas/aarch64/diagnostic.s,
	testsuite/gas/aarch64/diagnostic.l: Add tests for integer operands
	to FMOV.

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 40f6253..388c4bf 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2189,6 +2189,12 @@ parse_aarch64_imm_float (char **ccp, int *immed, bfd_boolean dp_p,
     }
   else
     {
+      if (reg_name_p (str, reg_type))
+	{
+	  set_recoverable_error (_("immediate operand required"));
+	  return FALSE;
+	}
+
       /* We must not accidentally parse an integer as a floating-point number.
 	 Make sure that the value we parse is not an integer by checking for
 	 special characters '.' or 'e'.  */
@@ -5223,8 +5229,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	       it is probably not worth the effort to support it.  */
 	    if (!(res1 = parse_aarch64_imm_float (&str, &qfloat, FALSE,
 						  imm_reg_type))
-		&& !(res2 = parse_constant_immediate (&str, &val,
-						      imm_reg_type)))
+		&& (error_p ()
+		    || !(res2 = parse_constant_immediate (&str, &val,
+							  imm_reg_type))))
 	      goto failure;
 	    if ((res1 && qfloat == 0) || (res2 && val == 0))
 	      {
@@ -5288,11 +5295,12 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	    bfd_boolean dp_p
 	      = (aarch64_get_qualifier_esize (inst.base.operands[0].qualifier)
 		 == 8);
-	    if (! parse_aarch64_imm_float (&str, &qfloat, dp_p, imm_reg_type))
-	      goto failure;
-	    if (qfloat == 0)
+	    if (!parse_aarch64_imm_float (&str, &qfloat, dp_p, imm_reg_type)
+		|| qfloat == 0)
 	      {
-		set_fatal_syntax_error (_("invalid floating-point constant"));
+		if (!error_p ())
+		  set_fatal_syntax_error (_("invalid floating-point"
+					    " constant"));
 		goto failure;
 	      }
 	    inst.base.operands[i].imm.value = encode_imm_float_bits (qfloat);
diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l
index c278887..67ef484 100644
--- a/gas/testsuite/gas/aarch64/diagnostic.l
+++ b/gas/testsuite/gas/aarch64/diagnostic.l
@@ -144,3 +144,7 @@
 [^:]*:255: Error: register element index out of range 0 to 15 at operand 1 -- `ld2 {v0\.b,v1\.b}\[-1\],\[x0\]'
 [^:]*:258: Error: register element index out of range 0 to 15 at operand 1 -- `ld2 {v0\.b,v1\.b}\[16\],\[x0\]'
 [^:]*:259: Error: register element index out of range 0 to 15 at operand 1 -- `ld2 {v0\.b,v1\.b}\[67\],\[x0\]'
+[^:]*:261: Error: invalid floating-point constant at operand 2 -- `fmov d0,#2'
+[^:]*:262: Error: invalid floating-point constant at operand 2 -- `fmov d0,#-2'
+[^:]*:263: Error: invalid floating-point constant at operand 2 -- `fmov s0,2'
+[^:]*:264: Error: invalid floating-point constant at operand 2 -- `fmov s0,-2'
diff --git a/gas/testsuite/gas/aarch64/diagnostic.s b/gas/testsuite/gas/aarch64/diagnostic.s
index ac2eb5c..3092b9b 100644
--- a/gas/testsuite/gas/aarch64/diagnostic.s
+++ b/gas/testsuite/gas/aarch64/diagnostic.s
@@ -257,3 +257,8 @@
 	ld2	{v0.b, v1.b}[15], [x0]
 	ld2	{v0.b, v1.b}[16], [x0]
 	ld2	{v0.b, v1.b}[67], [x0]
+
+	fmov	d0, #2
+	fmov	d0, #-2
+	fmov	s0, 2
+	fmov	s0, -2