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Re: [PATCH, ppc] Allow IMM8 operands to accept both signed and unsigned values
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: "Peter Bergner" <bergner at vnet dot ibm dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Tue, 17 May 2016 01:58:51 -0600
- Subject: Re: [PATCH, ppc] Allow IMM8 operands to accept both signed and unsigned values
- Authentication-results: sourceware.org; auth=none
- References: <1463173058 dot 4256 dot 45 dot camel at vnet dot ibm dot com>
>>> On 13.05.16 at 22:57, <bergner@vnet.ibm.com> wrote:
> The xxspltib instruction splats the 8-bit IMM8 operand into each byte of
> the VSX register. We currently only accept unsigned values that fit in a
> byte. With this change, we now accept signed or unsigned values that fit
> within a byte.
>
> Committed.
>
> Peter
>
>
> opcodes/
> * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
>
> gas/
> * testsuite/gas/ppc/power9.d <xxspltib>: Add additional operand tests.
> * testsuite/gas/ppc/power9.s: Likewise.
>
> diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
> index d4ba5d4..04f2231 100644
> --- a/opcodes/ppc-opc.c
> +++ b/opcodes/ppc-opc.c
> @@ -942,7 +942,7 @@ const struct powerpc_operand powerpc_operands[] =
>
> /* The 8-bit IMM8 field in a XX1 form instruction. */
> #define IMM8 IH + 1
> - { 0xff, 11, NULL, NULL, 0 },
> + { 0xff, 11, NULL, NULL, PPC_OPERAND_SIGNOPT },
> };
>
> const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
> diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d
> index 2e5593d..d84e635 100644
> --- a/gas/testsuite/gas/ppc/power9.d
> +++ b/gas/testsuite/gas/ppc/power9.d
> @@ -140,6 +140,8 @@ Disassembly of section \.text:
> .*: (f0 80 2a 94|94 2a 80 f0) xxextractuw vs4,vs5,0
> .*: (f1 0f 92 97|97 92 0f f1) xxextractuw vs40,vs50,15
> .*: (f0 80 02 d0|d0 02 80 f0) xxspltib vs4,0
> +.*: (f0 80 02 d0|d0 02 80 f0) xxspltib vs4,0
> +.*: (f1 27 fa d1|d1 fa 27 f1) xxspltib vs41,255
> .*: (f1 27 fa d1|d1 fa 27 f1) xxspltib vs41,255
> .*: (f0 a0 32 d4|d4 32 a0 f0) xxinsertw vs5,vs6,0
> .*: (f2 4f e2 d7|d7 e2 4f f2) xxinsertw vs50,vs60,15
> diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s
> index 6ee49d4..9cf306c 100644
> --- a/gas/testsuite/gas/ppc/power9.s
> +++ b/gas/testsuite/gas/ppc/power9.s
> @@ -131,7 +131,9 @@ power9:
> xxextractuw 4,5,0x0
> xxextractuw 40,50,0xf
> xxspltib 4,0x0
> + xxspltib 4,-256
Why would (and should) this now get accepted? It's out of range
even for signed 8-bit (and as we can see disassembles to 0).
Jan
> xxspltib 41,255
> + xxspltib 41,-1
> xxinsertw 5,6,0
> xxinsertw 50,60,0xf
> xxbrh 6,7