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Re: [AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions.
- From: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
- To: Matthew Wahab <matthew dot wahab at foss dot arm dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Mon, 14 Dec 2015 15:14:17 +0000
- Subject: Re: [AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions.
- Authentication-results: sourceware.org; auth=none
- References: <566AB800 dot 1090308 at foss dot arm dot com> <566ABB97 dot 8020702 at foss dot arm dot com>
On 11 December 2015 at 12:03, Matthew Wahab <matthew.wahab@foss.arm.com> wrote:
> gas/testsuite/
> 2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
>
> * gas/aarch64/advsimd-fp16.d: Update expected output.
> * gas/aarch64/advsimd-fp16.s: Add tests for vector two register
> misc.
> instructions.
>
> opcodes/
> 2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
>
> * aarch64-asm-2.c: Regenerate.
> * aarch64-dis-2.c: Regenerate.
> * aarch64-opc-2.c: Regenerate.
> * aarch64-tbl.h (QL_V2SAMEH): New.
> (aarch64_opcode_table): Add fp16 versions of frintn, frintm,
> fcvtns, fcvtms, fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fabs, frintp,
> frintz, fcvtps, fcvtzs, frecpe, frinta, frintx, fcvtnu, fcvtmu,
> fcvtau, ucvtf, fcmge, fcmle, fneg, frinti, fcvtpu, fcvtzu, frsqrte
> and fsqrt to the vector register misc. group.
>
OK /Marcus