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Re: [Aarch64] Support ARMv8.2 AT instructions
- From: Matthew Wahab <matthew dot wahab at foss dot arm dot com>
- To: binutils at sourceware dot org
- Date: Fri, 11 Dec 2015 12:58:33 +0000
- Subject: Re: [Aarch64] Support ARMv8.2 AT instructions
- Authentication-results: sourceware.org; auth=none
- References: <56697079 dot 6050709 at foss dot arm dot com> <CAFqB+Py0iKBQbuOR17AD8wCb7fH+mRyxP8t20BnLOK-LpsfJYQ at mail dot gmail dot com>
On 10/12/15 14:47, Marcus Shawcroft wrote:
On 10 December 2015 at 12:30, Matthew Wahab <matthew.wahab@foss.arm.com> wrote:
Hello,
ARMv8.2 adds new instructions AT S1E1RP and AT S1E1WP to Aarch64. This
patch adds support for the instructions, making them available when
-march=armv8.2-a is selected.
[..]
opcodes/
2015-12-09 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (aarch64_sys_regs_at): Add "s1e1rp" and "s1e1wp".
(aarch64_sys_ins_reg_supported_p): Add ARMv8.2 system register
feature test for "s1e1rp" and "s1e1wp".
OK /Marcus
I made a mistake with rebasing the ARMv8.2 AT instruction patch which
left this part
+ /* AT S1E1RP, AT S1E1WP. Values are from aarch64_sys_regs_at. */
+ if ((reg->value == CPENS (0, C7, C9, 0)
+ || reg->value == CPENS (0, C7, C9, 1))
+ && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return FALSE;
in aarch64_pstatefield_supported_p rather than in
aarch64_sys_ins_reg_supported_p, where it was supposed to be.
The patch adding support for id_aa64mmfr2_el1
(https://sourceware.org/ml/binutils-cvs/2015-11/msg00163.html), also had
the effect of removing a conditional branch in aarch64_sys_reg_supported_p.
The effect of both of these is to suppress an error if some ARMv8.2
system registers are used with the wrong -march settings.
This patch fixes these mistakes.
Tested for aarch64-none-linux-gnu with cross-compiled check-binutils and
check-gas.
opcodes/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (aarch64_sys_reg_supported_p): Add mistakenly
removed statement.
(aarch64_pstatefield_supported_p): Move feature checks for AT
registers ..
(aarch64_sys_ins_reg_supported_p): .. to here.
>From ec78dad31cce9553eed18ee0d68368e02abecd80 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Fri, 11 Dec 2015 11:36:14 +0000
Subject: [PATCH] [AArch64] Fix patch rebasing errors.
Change-Id: I45b38d08d7cbf1268e29897fbf1d441be2bdd0ab
---
opcodes/aarch64-opc.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b2f772e..fd74c6b 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3176,6 +3176,7 @@ aarch64_sys_reg_supported_p (const aarch64_feature_set features,
|| reg->value == CPENC (3, 5, C14, C3, 1)
|| reg->value == CPENC (3, 5, C14, C3, 2))
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_1))
+ return FALSE;
/* ARMv8.2 features. */
@@ -3245,12 +3246,6 @@ aarch64_pstatefield_supported_p (const aarch64_feature_set features,
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
return FALSE;
- /* AT S1E1RP, AT S1E1WP. Values are from aarch64_sys_regs_at. */
- if ((reg->value == CPENS (0, C7, C9, 0)
- || reg->value == CPENS (0, C7, C9, 1))
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
- return FALSE;
-
return TRUE;
}
@@ -3350,6 +3345,12 @@ aarch64_sys_ins_reg_supported_p (const aarch64_feature_set features,
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
return FALSE;
+ /* AT S1E1RP, AT S1E1WP. Values are from aarch64_sys_regs_at. */
+ if ((reg->value == CPENS (0, C7, C9, 0)
+ || reg->value == CPENS (0, C7, C9, 1))
+ && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return FALSE;
+
return TRUE;
}
--
2.1.4