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Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches


On Tue, May 12, 2015 at 5:20 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 12.05.15 at 13:54, <hjl.tools@gmail.com> wrote:
>> On Tue, May 12, 2015 at 3:41 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>> On 11.05.15 at 23:23, <hongjiu.lu@intel.com> wrote:
>>>> Disp16 and Disp32 aren't supported by direct branches in 64-bit mode.
>>>> This patch removes them from 64-bit direct branches.
>>>
>>> See the recent discussion regarding callw - these can certainly have
>>> 16-bit displacements on AMD CPUs. And while disassembly may just
>>> get "disturbed" by getting this wrong, assembly will produce bad
>>> code if you don't account for both cases (or refuse to assemble
>>> such mnemonics if they would require size overrides to be added).
>>>
>>> Apart from that I wonder why you do this for CALL and JMP, but not
>>> for Jcc, JCXZ, JRCXZ, LOOP, and LOOPcc.
>>>
>>> But first of all - please don't bias x86 binutils towards only supporting
>>> Intel hardware.
>>
>> Can you generate call/jmp with 16-bit displacement in 64-bit mode?
>
> Didn't check whether there is a mechanism currently; of course I
> would expect "data16 jmp <label>" to do precisely that.

Does my change generate different binary now?

-- 
H.J.


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