This is the mail archive of the mailing list for the binutils project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] A few ppc assembler fixes

On Thu, 2015-04-23 at 07:41 +0100, Jan Beulich wrote:
> Hmm, should assembling of instructions really be tied to specific
> implementations rather than to ISA version? Or, shouldn't there
> be an option to allow ISA-compliant code to assemble even if
> there is no implementation of these insns (in which case I'd
> assume the POWER<n> to represent such, whereas things like
> E500MC might indeed represent specific implementations)?

How would that solve this issue, since both operand orderings
are ISA complaint?  If it were as easy as is the insn listed
in the ISA, then accept it, I'd be for it, but with server
vs embedded and lots of "optional" categories, I'm not sure
the code would be any cleaner.  ...and it would take a complete
rewrite of this code to move to an ISA versus cpu enablement

> > --- a/gas/testsuite/gas/ppc/power7.d
> > +++ b/gas/testsuite/gas/ppc/power7.d
> > @@ -31,94 +31,82 @@ Disassembly of section \.text:
> In order to avoid such almost-rewrites to happen, would it be
> possible to (incrementally perhaps) replace the exact match on
> the addresses on the left hand side with regex-es, just like
> many (newer) x86 test cases do nowadays?

I agree, I hate these rewrites due to instruction address changes.
I'll have a look at what x86 does.  Thanks.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]