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Re: [PATCH][MIPS] Implement .module directive


Matthew Fortune <Matthew.Fortune@imgtec.com> writes:
> +  if (file_mips_opts.fp < 0)
> +    {
> +      /* No user specified float register size.
> +	 ??? GAS treats single-float processors as though they had 64-bit
> +	 float registers (although it complains when double-precision
> +	 instructions are used).  As things stand, saying they have 32-bit
> +	 registers would lead to spurious "register must be even" messages.
> +	 So here we assume float registers are never smaller than the
> +	 integer ones.  */
> +      if (file_mips_opts.gp == 64)
> +	/* 64-bit integer registers implies 64-bit float registers.  */
> +	file_mips_opts.fp = 64;
> +      else if ((file_mips_opts.ase & FP64_ASES)
> +	       && ISA_HAS_64BIT_FPRS (file_mips_opts.isa))
> +	/* -mips3d and -mdmx imply 64-bit float registers, if possible.  */
> +	file_mips_opts.fp = 64;

I assume you'll update this for the other patch.  Or we could just
make the comment vaguer: Handle ASEs that imply 64-bit float registers.

> +  /* MIPS3D and MDMX require 64-bit FPRs, so -mfp32 should stop those
> +     ASEs from being selected implicitly.  */
> +  if (file_mips_opts.fp != 64)
> +    file_ase_explicit |= ASE_MIPS3D | ASE_MDMX | ASE_MSA;

Same here.

> @@ -787,7 +787,7 @@ if { [istarget mips*-*-vxworks*] } {
>      run_dump_test "relax-swap1-mips2"
>      run_dump_test "relax-swap2"
>      run_dump_test_arches "relax-swap3"	[mips_arch_list_all]
> -    run_list_test_arches "relax-bc1any" "-mips3d -relax-branch" \
> +    run_list_test_arches "relax-bc1any" "-mips3d -64 -relax-branch" \
>  					[mips_arch_list_matching mips64 \
>  					    !micromips]
>      run_list_test_arches "relax-bposge" "-mdsp -relax-branch" \

Not all targets compile in support for n32 and n64, so -mabi=o64 would
be better than -64.

OK otherwise, thanks.

Richard


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