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[PATCH] Fix microMIPS dmfgc0 and dmtgc0 opcodes
- From: Chao-Ying Fu <Chao-Ying dot Fu at imgtec dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Sat, 5 Oct 2013 01:00:34 +0000
- Subject: [PATCH] Fix microMIPS dmfgc0 and dmtgc0 opcodes
- Authentication-results: sourceware.org; auth=none
Hi All,
We found opcode bugs for microMIPS dmfgc0 and dmtgc0 that
should have occupied opcode slots next to dmfc0 and dmtc0.
Here is the patch to fix.
opcode/ChangeLog
2013-10-04 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* micromips-opc.c (micromips_opcodes): Fix dmfgc0 and dmtgc0.
gas/testsuite/ChangeLog
2013-10-04 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* gas/mips/micromips@virt64.d: Fix dmfgc0 and dmtgc0.
Index: opcodes/micromips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/micromips-opc.c,v
retrieving revision 1.26
diff -u -p -r1.26 micromips-opc.c
--- opcodes/micromips-opc.c 23 Aug 2013 14:12:59 -0000 1.26
+++ opcodes/micromips-opc.c 5 Oct 2013 00:51:34 -0000
@@ -586,12 +586,12 @@ const struct mips_opcode micromips_opcod
{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, 0, I3, 0, 0 },
{"dmfc0", "t,G", 0x580000fc, 0xfc00ffff, WR_1|RD_C0, 0, I3, 0, 0 },
{"dmfc0", "t,G,H", 0x580000fc, 0xfc00c7ff, WR_1|RD_C0, 0, I3, 0, 0 },
-{"dmfgc0", "t,G", 0x580000e7, 0xfc00ffff, WR_1|RD_C0, 0, 0, IVIRT64, 0 },
-{"dmfgc0", "t,G,H", 0x580000e7, 0xfc00c7ff, WR_1|RD_C0, 0, 0, IVIRT64, 0 },
+{"dmfgc0", "t,G", 0x580004fc, 0xfc00ffff, WR_1|RD_C0, 0, 0, IVIRT64, 0 },
+{"dmfgc0", "t,G,H", 0x580004fc, 0xfc00c7ff, WR_1|RD_C0, 0, 0, IVIRT64, 0 },
{"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
{"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
-{"dmtgc0", "t,G", 0x580002e7, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
-{"dmtgc0", "t,G,H", 0x580002e7, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
+{"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
+{"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
{"dmfc1", "t,S", 0x5400243b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I3, 0, 0 },
{"dmfc1", "t,G", 0x5400243b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I3, 0, 0 },
{"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S, 0, I3, 0, 0 },
Index: gas/testsuite/gas/mips/micromips@virt64.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/micromips@virt64.d,v
retrieving revision 1.1
diff -u -p -r1.1 micromips@virt64.d
--- gas/testsuite/gas/mips/micromips@virt64.d 13 Jun 2013 21:04:33 -0000 1.1
+++ gas/testsuite/gas/mips/micromips@virt64.d 5 Oct 2013 00:51:21 -0000
@@ -6,8 +6,8 @@
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 587d 00e7 dmfgc0 v1,c0_taghi
-[0-9a-f]+ <[^>]*> 5974 28e7 dmfgc0 a7,\$20,5
-[0-9a-f]+ <[^>]*> 5ae2 02e7 dmtgc0 s7,c0_entrylo0
-[0-9a-f]+ <[^>]*> 58ee 12e7 dmtgc0 a3,\$14,2
+[0-9a-f]+ <[^>]*> 587d 04fc dmfgc0 v1,c0_taghi
+[0-9a-f]+ <[^>]*> 5974 2cfc dmfgc0 a7,\$20,5
+[0-9a-f]+ <[^>]*> 5ae2 06fc dmtgc0 s7,c0_entrylo0
+[0-9a-f]+ <[^>]*> 58ee 16fc dmtgc0 a3,\$14,2
\.\.\.
No new regressions for mips-sde-elf targets. Ok to commit?
Thanks a lot!
Regards,
Chao-ying