Re: [Patch, AArch64, 3/5] backport recent fixes to 2.23 - add missing support for preload hints

[Yufeng Zhang <Yufeng dot Zhang at arm dot com>]

This patch adds missing support for a number of preload hints (PRFM 
<prfop> operand).  It was committed to the trunk at:

http://sourceware.org/ml/binutils-cvs/2013-01/msg00016.html

OK for 2_23-branch?

Thanks,
Yufeng

opcodes/

	* aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,
	PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM.

gas/testsuite/

	* gas/aarch64/system.d: Update.
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index 8192c71..63e0b4c 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -230,36 +230,36 @@ Disassembly of section \.text:
  358:	f8af6be7 	prfm	#0x07, \[sp,x15\]
  35c:	f8be58e7 	prfm	#0x07, \[x7,w30,uxtw #3\]
  360:	f9800c67 	prfm	#0x07, \[x3,#24\]
- 364:	d8000008 	prfm	#0x08, 0 <LABEL1>
+ 364:	d8000008 	prfm	plil1keep, 0 <LABEL1>
 			364: R_AARCH64_LD_PREL_LO19	LABEL1
- 368:	f8af6be8 	prfm	#0x08, \[sp,x15\]
- 36c:	f8be58e8 	prfm	#0x08, \[x7,w30,uxtw #3\]
- 370:	f9800c68 	prfm	#0x08, \[x3,#24\]
- 374:	d8000009 	prfm	#0x09, 0 <LABEL1>
+ 368:	f8af6be8 	prfm	plil1keep, \[sp,x15\]
+ 36c:	f8be58e8 	prfm	plil1keep, \[x7,w30,uxtw #3\]
+ 370:	f9800c68 	prfm	plil1keep, \[x3,#24\]
+ 374:	d8000009 	prfm	plil1strm, 0 <LABEL1>
 			374: R_AARCH64_LD_PREL_LO19	LABEL1
- 378:	f8af6be9 	prfm	#0x09, \[sp,x15\]
- 37c:	f8be58e9 	prfm	#0x09, \[x7,w30,uxtw #3\]
- 380:	f9800c69 	prfm	#0x09, \[x3,#24\]
- 384:	d800000a 	prfm	#0x0a, 0 <LABEL1>
+ 378:	f8af6be9 	prfm	plil1strm, \[sp,x15\]
+ 37c:	f8be58e9 	prfm	plil1strm, \[x7,w30,uxtw #3\]
+ 380:	f9800c69 	prfm	plil1strm, \[x3,#24\]
+ 384:	d800000a 	prfm	plil2keep, 0 <LABEL1>
 			384: R_AARCH64_LD_PREL_LO19	LABEL1
- 388:	f8af6bea 	prfm	#0x0a, \[sp,x15\]
- 38c:	f8be58ea 	prfm	#0x0a, \[x7,w30,uxtw #3\]
- 390:	f9800c6a 	prfm	#0x0a, \[x3,#24\]
- 394:	d800000b 	prfm	#0x0b, 0 <LABEL1>
+ 388:	f8af6bea 	prfm	plil2keep, \[sp,x15\]
+ 38c:	f8be58ea 	prfm	plil2keep, \[x7,w30,uxtw #3\]
+ 390:	f9800c6a 	prfm	plil2keep, \[x3,#24\]
+ 394:	d800000b 	prfm	plil2strm, 0 <LABEL1>
 			394: R_AARCH64_LD_PREL_LO19	LABEL1
- 398:	f8af6beb 	prfm	#0x0b, \[sp,x15\]
- 39c:	f8be58eb 	prfm	#0x0b, \[x7,w30,uxtw #3\]
- 3a0:	f9800c6b 	prfm	#0x0b, \[x3,#24\]
- 3a4:	d800000c 	prfm	#0x0c, 0 <LABEL1>
+ 398:	f8af6beb 	prfm	plil2strm, \[sp,x15\]
+ 39c:	f8be58eb 	prfm	plil2strm, \[x7,w30,uxtw #3\]
+ 3a0:	f9800c6b 	prfm	plil2strm, \[x3,#24\]
+ 3a4:	d800000c 	prfm	plil3keep, 0 <LABEL1>
 			3a4: R_AARCH64_LD_PREL_LO19	LABEL1
- 3a8:	f8af6bec 	prfm	#0x0c, \[sp,x15\]
- 3ac:	f8be58ec 	prfm	#0x0c, \[x7,w30,uxtw #3\]
- 3b0:	f9800c6c 	prfm	#0x0c, \[x3,#24\]
- 3b4:	d800000d 	prfm	#0x0d, 0 <LABEL1>
+ 3a8:	f8af6bec 	prfm	plil3keep, \[sp,x15\]
+ 3ac:	f8be58ec 	prfm	plil3keep, \[x7,w30,uxtw #3\]
+ 3b0:	f9800c6c 	prfm	plil3keep, \[x3,#24\]
+ 3b4:	d800000d 	prfm	plil3strm, 0 <LABEL1>
 			3b4: R_AARCH64_LD_PREL_LO19	LABEL1
- 3b8:	f8af6bed 	prfm	#0x0d, \[sp,x15\]
- 3bc:	f8be58ed 	prfm	#0x0d, \[x7,w30,uxtw #3\]
- 3c0:	f9800c6d 	prfm	#0x0d, \[x3,#24\]
+ 3b8:	f8af6bed 	prfm	plil3strm, \[sp,x15\]
+ 3bc:	f8be58ed 	prfm	plil3strm, \[x7,w30,uxtw #3\]
+ 3c0:	f9800c6d 	prfm	plil3strm, \[x3,#24\]
  3c4:	d800000e 	prfm	#0x0e, 0 <LABEL1>
 			3c4: R_AARCH64_LD_PREL_LO19	LABEL1
  3c8:	f8af6bee 	prfm	#0x0e, \[sp,x15\]
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 180057d..a55fb13 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -334,10 +334,10 @@ const struct aarch64_name_value_pair aarch64_barrier_options[16] =
     { "sy",    0xf },
 };
 
-/* op -> op:       load = 0 store = 1
+/* op -> op:       load = 0 instruction = 1 store = 2
    l  -> level:    1-3
    t  -> temporal: temporal (retained) = 0 non-temporal (streaming) = 1   */
-#define B(op,l,t) ((((op) * 2) << 3) | (((l) - 1) << 1) | (t))
+#define B(op,l,t) (((op) << 3) | (((l) - 1) << 1) | (t))
 const struct aarch64_name_value_pair aarch64_prfops[32] =
 {
   { "pldl1keep", B(0, 1, 0) },
@@ -348,20 +348,20 @@ const struct aarch64_name_value_pair aarch64_prfops[32] =
   { "pldl3strm", B(0, 3, 1) },
   { "#0x06", 0x06 },
   { "#0x07", 0x07 },
-  { "#0x08", 0x08 },
-  { "#0x09", 0x09 },
-  { "#0x0a", 0x0a },
-  { "#0x0b", 0x0b },
-  { "#0x0c", 0x0c },
-  { "#0x0d", 0x0d },
+  { "plil1keep", B(1, 1, 0) },
+  { "plil1strm", B(1, 1, 1) },
+  { "plil2keep", B(1, 2, 0) },
+  { "plil2strm", B(1, 2, 1) },
+  { "plil3keep", B(1, 3, 0) },
+  { "plil3strm", B(1, 3, 1) },
   { "#0x0e", 0x0e },
   { "#0x0f", 0x0f },
-  { "pstl1keep", B(1, 1, 0) },
-  { "pstl1strm", B(1, 1, 1) },
-  { "pstl2keep", B(1, 2, 0) },
-  { "pstl2strm", B(1, 2, 1) },
-  { "pstl3keep", B(1, 3, 0) },
-  { "pstl3strm", B(1, 3, 1) },
+  { "pstl1keep", B(2, 1, 0) },
+  { "pstl1strm", B(2, 1, 1) },
+  { "pstl2keep", B(2, 2, 0) },
+  { "pstl2strm", B(2, 2, 1) },
+  { "pstl3keep", B(2, 3, 0) },
+  { "pstl3strm", B(2, 3, 1) },
   { "#0x16", 0x16 },
   { "#0x17", 0x17 },
   { "#0x18", 0x18 },