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Re: [Patch, AArch64] Fix alignment check on load/store uimm12 offset

From: Richard Earnshaw <rearnsha at arm dot com>
To: Yufeng Zhang <Yufeng dot Zhang at arm dot com>
Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>
Date: Fri, 12 Oct 2012 15:24:53 +0100
Subject: Re: [Patch, AArch64] Fix alignment check on load/store uimm12 offset
References: <50781E81.3040902@arm.com>

On 12/10/12 14:43, Yufeng Zhang wrote:

Hi,

This patch fixes the alignment check on the immediate offset of the
load/store instructions with 12-bit unsigned immediate field.  It fixes
the bug where e.g. ldr x0, [x0, #257] was silently assembled as ldr x0,
[x0, #256].

Is it OK to commit?

Thanks,
Yufeng

opcodes/ChangeLog

          * aarch64-opc.c (operand_general_constraint_met_p): Change to check
          the alignment of addr.offset.imm instead of that of
shifter.amount for
          operand type AARCH64_OPND_ADDR_UIMM12.

gas/testsuite/ChangeLog

          * gas/aarch64/illegal-2.s: Add test case.
          * gas/aarch64/illegal-2.l: Likewise.

OK.

R.

References:
- [Patch, AArch64] Fix alignment check on load/store uimm12 offset
  - From: Yufeng Zhang

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