Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.478
diff -u -p -r1.478 tc-arm.c
--- gas/config/tc-arm.c	14 Mar 2011 16:04:12 -0000	1.478
+++ gas/config/tc-arm.c	11 Apr 2011 18:21:22 -0000
@@ -9257,6 +9257,9 @@ do_t_add_sub (void)
 	}
       else
 	{
+	  unsigned int value = inst.reloc.exp.X_add_number;
+	  unsigned int shift = inst.operands[2].shift_kind;
+
 	  Rn = inst.operands[2].reg;
 	  /* See if we can do this with a 16-bit instruction.  */
 	  if (!inst.operands[2].shifted && inst.size_req != 4)
@@ -9307,6 +9310,10 @@ do_t_add_sub (void)
 	  inst.instruction = THUMB_OP32 (inst.instruction);
 	  inst.instruction |= Rd << 8;
 	  inst.instruction |= Rs << 16;
+	  constraint (Rd == REG_SP && Rs == REG_SP && value > 3,
+		      _("shift value over 3 not allowed in thumb mode"));
+	  constraint (Rd == REG_SP && Rs == REG_SP && shift != SHIFT_LSL,
+		      _("only LSL shift allowed in thumb mode"));
 	  encode_thumb32_shifted_operand (2);
 	}
     }
Index: gas/testsuite/gas/arm/addthumb2err.d
===================================================================
RCS file: gas/testsuite/gas/arm/addthumb2err.d
diff -N gas/testsuite/gas/arm/addthumb2err.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/addthumb2err.d	11 Apr 2011 18:21:22 -0000
@@ -0,0 +1,7 @@
+#name: bad Thumb2 Add{S} and Sub{S} instructions
+#as: -march=armv7-a
+#error-output: addthumb2err.l
+
+# Test some Thumb2 instructions:
+
+.*: +file format .*arm.*
Index: gas/testsuite/gas/arm/addthumb2err.l
===================================================================
RCS file: gas/testsuite/gas/arm/addthumb2err.l
diff -N gas/testsuite/gas/arm/addthumb2err.l
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/addthumb2err.l	11 Apr 2011 18:21:22 -0000
@@ -0,0 +1,21 @@
+[^:]*: Assembler messages:
+[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4'
+[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR#3'
+[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3'
+[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR#3'
+[^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX'
+[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL#4'
+[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3'
+[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR#3'
+[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3'
+[^:]*:18: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,RRX'
+[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4'
+[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR#3'
+[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3'
+[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR#3'
+[^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX'
+[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL#4'
+[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3'
+[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR#3'
+[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3'
+[^:]*:28: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,RRX'
Index: gas/testsuite/gas/arm/addthumb2err.s
===================================================================
RCS file: gas/testsuite/gas/arm/addthumb2err.s
diff -N gas/testsuite/gas/arm/addthumb2err.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/addthumb2err.s	11 Apr 2011 18:21:22 -0000
@@ -0,0 +1,28 @@
+	.syntax unified
+	.text
+	.align	2
+	.thumb
+
+	# Test of invalid operands for ADD{S} and SUB{S} instructions
+	# in Thumb2 mode.  The instruction form being testing
+	# involves having the first 2 operands be SP.
+	add sp, sp, r0, LSL #4
+	add sp, sp, r0, LSR #3
+	add sp, sp, r0, ASR #3
+	add sp, sp, r0, ROR #3
+	add sp, sp, r0, RRX
+	adds sp, sp, r0, LSL #4
+	adds sp, sp, r0, LSR #3
+	adds sp, sp, r0, ASR #3
+	adds sp, sp, r0, ROR #3
+	adds sp, sp, r0, RRX
+	sub sp, sp, r0, LSL #4
+	sub sp, sp, r0, LSR #3
+	sub sp, sp, r0, ASR #3
+	sub sp, sp, r0, ROR #3
+	sub sp, sp, r0, RRX
+	subs sp, sp, r0, LSL #4
+	subs sp, sp, r0, LSR #3
+	subs sp, sp, r0, ASR #3
+	subs sp, sp, r0, ROR #3
+	subs sp, sp, r0, RRX