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binutils and gas testsuite fixes


Assorted fixes for unloved ports.

binutils/
	* dwarf.c (byte_get_little_endian): Handle size of 3.
	(byte_get_big_endian): Likewise.
	* readelf.c (byte_put_little_endian): Likewise.
	(byte_put_big_endian): Likewise.
	(is_24bit_abs_reloc): New function.
	(is_none_reloc): Formatting.
	(apply_relocations): Use is_24bit_abs_reloc.  Handle pj and xtensa
	reloc peculiarity.
binutils/testsuite/
	* binutils-all/objdump.exp (cpus_expected): Add ms1.
gas/
	* read.c (emit_expr_fix): Handle size 3.
	* config/tc-avr.c (md_assemble): Call dwarf2_emit_insn.
	* config/tc-d30v.c (write_long, write_1_short,
	write_2_short, md_assemble): Likewise.
	* config/tc-dlx.c (md_assemble): Likewise.
	* config/tc-i860.c (md_assemble): Likewise.
	* config/tc-mn10200.c (md_assemble): Likewise.
	* config/tc-pj.c (md_assemble): Likewise.
	* config/tc-vax.c (md_assemble): Likewise.
gas/testsuite/
	* gas/d30v/serial2.l: Adjust position of page break.
	* gas/lns/lns-common-1-alt.d: Match 2009-04-24 change.
	* gas/mt/ms1-16-003.d: Correct reloc name.
	* gas/mt/relocs.d: Elide incorrect file format strings.

Index: binutils/dwarf.c
===================================================================
RCS file: /cvs/src/src/binutils/dwarf.c,v
retrieving revision 1.54
diff -u -p -r1.54 dwarf.c
--- binutils/dwarf.c	7 Sep 2009 18:07:02 -0000	1.54
+++ binutils/dwarf.c	8 Sep 2009 08:25:36 -0000
@@ -72,6 +72,11 @@ byte_get_little_endian (unsigned char *f
       return  ((unsigned int) (field[0]))
 	|    (((unsigned int) (field[1])) << 8);
 
+    case 3:
+      return  ((unsigned long) (field[0]))
+	|    (((unsigned long) (field[1])) << 8)
+	|    (((unsigned long) (field[2])) << 16);
+
     case 4:
       return  ((unsigned long) (field[0]))
 	|    (((unsigned long) (field[1])) << 8)
@@ -114,6 +119,11 @@ byte_get_big_endian (unsigned char *fiel
     case 2:
       return ((unsigned int) (field[1])) | (((int) (field[0])) << 8);
 
+    case 3:
+      return ((unsigned long) (field[2]))
+	|   (((unsigned long) (field[1])) << 8)
+	|   (((unsigned long) (field[0])) << 16);
+
     case 4:
       return ((unsigned long) (field[3]))
 	|   (((unsigned long) (field[2])) << 8)
Index: binutils/readelf.c
===================================================================
RCS file: /cvs/src/src/binutils/readelf.c,v
retrieving revision 1.455
diff -u -p -r1.455 readelf.c
--- binutils/readelf.c	7 Sep 2009 18:08:52 -0000	1.455
+++ binutils/readelf.c	8 Sep 2009 08:25:43 -0000
@@ -342,6 +342,8 @@ byte_put_little_endian (unsigned char * 
       /* Fall through.  */
     case 4:
       field[3] = (value >> 24) & 0xff;
+      /* Fall through.  */
+    case 3:
       field[2] = (value >> 16) & 0xff;
       /* Fall through.  */
     case 2:
@@ -505,8 +507,11 @@ byte_put_big_endian (unsigned char * fie
       /* Fall through.  */
     case 4:
       field[3] = value & 0xff;
-      field[2] = (value >> 8) & 0xff;
-      value >>= 16;
+      value >>= 8;
+      /* Fall through.  */
+    case 3:
+      field[2] = value & 0xff;
+      value >>= 8;
       /* Fall through.  */
     case 2:
       field[1] = value & 0xff;
@@ -8100,6 +8105,22 @@ is_64bit_pcrel_reloc (unsigned int reloc
 }
 
 /* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+   a 24-bit absolute RELA relocation used in DWARF debug sections.  */
+
+static bfd_boolean
+is_24bit_abs_reloc (unsigned int reloc_type)
+{
+  switch (elf_header.e_machine)
+    {
+    case EM_CYGNUS_MN10200:
+    case EM_MN10200:
+      return reloc_type == 4; /* R_MN10200_24.  */
+    default:
+      return FALSE;
+    }
+}
+
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
    a 16-bit absolute RELA relocation used in DWARF debug sections.  */
 
 static bfd_boolean
@@ -8165,10 +8186,10 @@ is_none_reloc (unsigned int reloc_type)
       return reloc_type == 0;
     case EM_XTENSA_OLD:
     case EM_XTENSA:
-      return reloc_type == 0      /* R_XTENSA_NONE.  */
-	     || reloc_type == 17  /* R_XTENSA_DIFF8.  */
-	     || reloc_type == 18  /* R_XTENSA_DIFF16.  */
-	     || reloc_type == 19; /* R_XTENSA_DIFF32.  */
+      return (reloc_type == 0      /* R_XTENSA_NONE.  */
+	      || reloc_type == 17  /* R_XTENSA_DIFF8.  */
+	      || reloc_type == 18  /* R_XTENSA_DIFF16.  */
+	      || reloc_type == 19  /* R_XTENSA_DIFF32.  */);
     }
   return FALSE;
 }
@@ -8250,6 +8271,8 @@ apply_relocations (void * file,
 	  else if (is_64bit_abs_reloc (reloc_type)
 		   || is_64bit_pcrel_reloc (reloc_type))
 	    reloc_size = 8;
+	  else if (is_24bit_abs_reloc (reloc_type))
+	    reloc_size = 3;
 	  else if (is_16bit_abs_reloc (reloc_type))
 	    reloc_size = 2;
 	  else
@@ -8293,7 +8316,17 @@ apply_relocations (void * file,
 	      continue;
 	    }
 
-	  addend = is_rela ? rp->r_addend : byte_get (loc, reloc_size);
+	  addend = 0;
+	  if (is_rela)
+	    addend += rp->r_addend;
+	  /* R_XTENSA_32 and R_PJ_DATA_DIR32 are partial_inplace.  */
+	  if (!is_rela
+	      || (elf_header.e_machine == EM_XTENSA
+		  && reloc_type == 1)
+	      || ((elf_header.e_machine == EM_PJ
+		   || elf_header.e_machine == EM_PJ_OLD)
+		  && reloc_type == 1))
+	    addend += byte_get (loc, reloc_size);
 
 	  if (is_32bit_pcrel_reloc (reloc_type)
 	      || is_64bit_pcrel_reloc (reloc_type))
Index: binutils/testsuite/binutils-all/objdump.exp
===================================================================
RCS file: /cvs/src/src/binutils/testsuite/binutils-all/objdump.exp,v
retrieving revision 1.26
diff -u -p -r1.26 objdump.exp
--- binutils/testsuite/binutils-all/objdump.exp	5 Sep 2009 00:42:29 -0000	1.26
+++ binutils/testsuite/binutils-all/objdump.exp	8 Sep 2009 08:25:46 -0000
@@ -39,7 +39,7 @@ set cpus_expected [list]
 lappend cpus_expected alpha arc arm cris
 lappend cpus_expected d10v d30v fr30 fr500 fr550 h8 hppa i386 i860 i960 ip2022
 lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k m88k MCore
-lappend cpus_expected mips mn10200 mn10300 msp ns32k pj powerpc pyramid
+lappend cpus_expected mips mn10200 mn10300 ms1 msp ns32k pj powerpc pyramid
 lappend cpus_expected romp rs6000 s390 sh sparc
 lappend cpus_expected tahoe tic54x tic80 tms320c30 tms320c4x tms320c54x v850
 lappend cpus_expected vax we32k x86-64 xscale xtensa z8k z8001 z8002
Index: gas/read.c
===================================================================
RCS file: /cvs/src/src/gas/read.c,v
retrieving revision 1.153
diff -u -p -r1.153 read.c
--- gas/read.c	2 Sep 2009 07:24:19 -0000	1.153
+++ gas/read.c	8 Sep 2009 08:25:50 -0000
@@ -4265,6 +4263,9 @@ emit_expr_fix (expressionS *exp, unsigne
       case 2:
 	r = BFD_RELOC_16;
 	break;
+      case 3:
+	r = BFD_RELOC_24;
+	break;
       case 4:
 	r = BFD_RELOC_32;
 	break;
Index: gas/config/tc-avr.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-avr.c,v
retrieving revision 1.68
diff -u -p -r1.68 tc-avr.c
--- gas/config/tc-avr.c	2 Sep 2009 07:24:20 -0000	1.68
+++ gas/config/tc-avr.c	8 Sep 2009 08:25:54 -0000
@@ -1366,6 +1366,8 @@ md_assemble (char *str)
   if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
     as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
 
+  dwarf2_emit_insn (0);
+
   /* We used to set input_line_pointer to the result of get_operands,
      but that is wrong.  Our caller assumes we don't change it.  */
   {
Index: gas/config/tc-d30v.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-d30v.c,v
retrieving revision 1.36
diff -u -p -r1.36 tc-d30v.c
--- gas/config/tc-d30v.c	2 Sep 2009 07:24:20 -0000	1.36
+++ gas/config/tc-d30v.c	8 Sep 2009 08:25:55 -0000
@@ -23,6 +23,7 @@
 #include "safe-ctype.h"
 #include "subsegs.h"
 #include "opcode/d30v.h"
+#include "dwarf2dbg.h"
 
 const char comment_chars[]        = ";";
 const char line_comment_chars[]   = "#";
@@ -593,6 +594,7 @@ write_long (struct d30v_insn *opcode ATT
   int i, where;
   char *f = frag_more (8);
 
+  dwarf2_emit_insn (8);
   insn |= FM11;
   d30v_number_to_chars (f, insn, 8);
 
@@ -620,6 +622,7 @@ write_1_short (struct d30v_insn *opcode,
   char *f = frag_more (8);
   int i, where;
 
+  dwarf2_emit_insn (8);
   if (warn_nops == NOP_ALL)
     as_warn (_("%s NOP inserted"), use_sequential ?
 	     _("sequential") : _("parallel"));
@@ -1087,6 +1090,7 @@ write_2_short (struct d30v_insn *opcode1
     }
 
   f = frag_more (8);
+  dwarf2_emit_insn (8);
   d30v_number_to_chars (f, insn, 8);
 
   /* If the previous instruction was a 32-bit multiply but it is put into a
@@ -1684,6 +1688,7 @@ md_assemble (char *str)
 	      else
 		{
 		  f = frag_more (8);
+		  dwarf2_emit_insn (8);
 		  d30v_number_to_chars (f, NOP2, 8);
 
 		  if (warn_nops == NOP_ALL || warn_nops == NOP_MULTIPLY)
Index: gas/config/tc-dlx.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-dlx.c,v
retrieving revision 1.22
diff -u -p -r1.22 tc-dlx.c
--- gas/config/tc-dlx.c	2 Sep 2009 07:24:20 -0000	1.22
+++ gas/config/tc-dlx.c	8 Sep 2009 08:25:55 -0000
@@ -909,6 +909,8 @@ md_assemble (char *str)
   know (str);
   machine_ip (str);
   toP = frag_more (4);
+  dwarf2_emit_insn (4);
+
   /* Put out the opcode.  */
   md_number_to_chars (toP, the_insn.opcode, 4);
 
Index: gas/config/tc-i860.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-i860.c,v
retrieving revision 1.36
diff -u -p -r1.36 tc-i860.c
--- gas/config/tc-i860.c	2 Sep 2009 07:24:20 -0000	1.36
+++ gas/config/tc-i860.c	8 Sep 2009 08:25:56 -0000
@@ -408,6 +408,7 @@ md_assemble (char *str)
 	as_warn (_("An instruction was expanded (%s)"), str);
     }
 
+  dwarf2_emit_insn (0);
   i = 0;
   do
     {
Index: gas/config/tc-mn10200.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mn10200.c,v
retrieving revision 1.23
diff -u -p -r1.23 tc-mn10200.c
--- gas/config/tc-mn10200.c	17 Oct 2007 16:45:55 -0000	1.23
+++ gas/config/tc-mn10200.c	8 Sep 2009 08:25:56 -0000
@@ -1156,6 +1156,7 @@ keep_going:
     abort ();
 
   /* Write out the instruction.  */
+  dwarf2_emit_insn (0);
   if (relaxable && fc > 0)
     {
       /* On a 64-bit host the size of an 'int' is not the same
Index: gas/config/tc-pj.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-pj.c,v
retrieving revision 1.22
diff -u -p -r1.22 tc-pj.c
--- gas/config/tc-pj.c	2 Sep 2009 07:24:20 -0000	1.22
+++ gas/config/tc-pj.c	8 Sep 2009 08:25:57 -0000
@@ -261,6 +261,7 @@ md_assemble (char *str)
       return;
     }
 
+  dwarf2_emit_insn (0);
   if (opcode->opcode == -1)
     {
       /* It's a fake opcode.  Dig out the args and pretend that was
Index: gas/config/tc-vax.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-vax.c,v
retrieving revision 1.41
diff -u -p -r1.41 tc-vax.c
--- gas/config/tc-vax.c	2 Sep 2009 07:24:20 -0000	1.41
+++ gas/config/tc-vax.c	8 Sep 2009 08:26:00 -0000
@@ -2713,6 +2713,7 @@ md_assemble (char *instruction_string)
   if (need_pass_2 || goofed)
     return;
 
+  dwarf2_emit_insn (0);
   /* Emit op-code.  */
   /* Remember where it is, in case we want to modify the op-code later.  */
   opcode_low_byteP = frag_more (v.vit_opcode_nbytes);
Index: gas/testsuite/gas/d30v/serial2.l
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/d30v/serial2.l,v
retrieving revision 1.2
diff -u -p -r1.2 serial2.l
--- gas/testsuite/gas/d30v/serial2.l	3 Mar 2005 12:35:19 -0000	1.2
+++ gas/testsuite/gas/d30v/serial2.l	8 Sep 2009 08:26:01 -0000
@@ -79,10 +79,10 @@ GAS LISTING .*
   17      00F00000 
   18 \?\?\?\? 10080001 		bra/tx -3 -> bra 10     ;      Valid
 \*\*\*\*  Error:Unable to mix instructions as specified
-  18      00F00000 
 GAS LISTING .*
 
 
+  18      00F00000 
   18      100BFFFF 
   18      00F00000 
   19 \?\?\?\? 00080001 		bra/tx -3 -> bra/fx 10  ;      Valid
Index: gas/testsuite/gas/lns/lns-common-1-alt.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/lns/lns-common-1-alt.d,v
retrieving revision 1.2
diff -u -p -r1.2 lns-common-1-alt.d
--- gas/testsuite/gas/lns/lns-common-1-alt.d	11 Apr 2008 17:51:15 -0000	1.2
+++ gas/testsuite/gas/lns/lns-common-1-alt.d	8 Sep 2009 08:26:02 -0000
@@ -34,6 +34,10 @@ Raw dump of debug contents of section \.
   Advance Line by 1 to 7
   Advance PC by fixed size amount .* to .*
   Copy
+  Extended opcode 4: set Discriminator to 1
+  Advance Line by 0 to 7
+  Advance PC by fixed size amount .* to .*
+  Copy
   Advance PC by fixed size amount .* to .*
   Extended opcode 1: End of Sequence
 #...
Index: gas/testsuite/gas/mt/ms1-16-003.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mt/ms1-16-003.d,v
retrieving revision 1.1
diff -u -p -r1.1 ms1-16-003.d
--- gas/testsuite/gas/mt/ms1-16-003.d	12 Dec 2005 11:16:40 -0000	1.1
+++ gas/testsuite/gas/mt/ms1-16-003.d	8 Sep 2009 08:26:02 -0000
@@ -14,7 +14,7 @@ Disassembly of section .text:
    8:	09 00 00 00 	muli R0,R0,#\$0
 0000000c <dbnz_>:
    c:	3d 00 00 00 	dbnz R0,c <dbnz_>
-[ 	]*c: R_MS1_PC16	dbnz
+[ 	]*c: R_MT_PC16	dbnz
 00000010 <fbcbincs>:
   10:	f0 00 00 00 	fbcbincs #\$0,#\$0,#\$0,#\$0,#\$0,#\$0,#\$0,#\$0,#\$0,#\$0
 00000014 <mfbcbincs>:
Index: gas/testsuite/gas/mt/relocs.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mt/relocs.d,v
retrieving revision 1.1
diff -u -p -r1.1 relocs.d
--- gas/testsuite/gas/mt/relocs.d	12 Dec 2005 11:16:40 -0000	1.1
+++ gas/testsuite/gas/mt/relocs.d	8 Sep 2009 08:26:02 -0000
@@ -1,5 +1,5 @@
 
-relocs.x:     file format elf32-(mrisc1|ms1)
+relocs.x:     file format .*
 
 Contents of section .text:
  2000 00131000 3700dffc 12000000 3700fff8  ....7.......7...

-- 
Alan Modra
Australia Development Lab, IBM


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