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[PATCH bfin] Fix a bug of assembling parallel instructions
- From: Jie Zhang <jie dot zhang at analog dot com>
- To: Binutils <binutils at sourceware dot org>
- Date: Fri, 4 Sep 2009 00:52:57 +0800
- Subject: [PATCH bfin] Fix a bug of assembling parallel instructions
When -mcpu option is added, GAS tries to check for anomaly 05000074. gas
checks the instructions in slot 1 and slot 2. But if slot 1 is empty,
the pointer pointing to the first instruction is null, looking into it
causes segment fault. This patch fixes it.
Committed.
Jie
* config/bfin-parse.y (gen_multi_instr_1): Check anomaly
05000074 only when both slot1 and slot2 are filled.
testsuite/
* gas/bfin/parallel5.s: New test.
* gas/bfin/error.exp: New test.
Index: config/bfin-parse.y
===================================================================
RCS file: /cvs/src/src/gas/config/bfin-parse.y,v
retrieving revision 1.31
diff -u -p -r1.31 bfin-parse.y
--- config/bfin-parse.y 3 Sep 2009 16:17:36 -0000 1.31
+++ config/bfin-parse.y 3 Sep 2009 16:45:15 -0000
@@ -391,6 +391,7 @@ gen_multi_instr_1 (INSTR_T dsp32, INSTR_
/* Anomaly 05000074 */
if (ENABLE_AC_05000074
+ && dsp32 != NULL && dsp16_grp1 != NULL
&& (dsp32->value & 0xf780) == 0xc680
&& ((dsp16_grp1->value & 0xfe40) == 0x9240
|| (dsp16_grp1->value & 0xfe08) == 0xba08
Index: testsuite/gas/bfin/error.exp
===================================================================
RCS file: testsuite/gas/bfin/error.exp
diff -N testsuite/gas/bfin/error.exp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ testsuite/gas/bfin/error.exp 3 Sep 2009 16:45:15 -0000
@@ -0,0 +1,10 @@
+# Test assembler warnings and errors.
+
+load_lib gas-dg.exp
+dg-init
+
+if [istarget bfin-*-*] {
+ dg-runtest "$srcdir/$subdir/parallel5.s" "" ""
+}
+
+dg-finish
Index: testsuite/gas/bfin/parallel5.s
===================================================================
RCS file: testsuite/gas/bfin/parallel5.s
diff -N testsuite/gas/bfin/parallel5.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ testsuite/gas/bfin/parallel5.s 3 Sep 2009 16:45:15 -0000
@@ -0,0 +1,4 @@
+# { dg-do assemble { target bfin-*-* } }
+# { dg-options "--mcpu=bf537-0.2" }
+ .section .text;
+ R0 = W[P1++] (X) || R1.L = W[I1++];