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[PATCH resent] opcodes m68k : fix cfv4e movecr disassembly
- From: Philippe De Muyter <phdm at macqel dot be>
- To: binutils at sourceware dot org
- Date: Mon, 24 Aug 2009 16:29:51 +0200
- Subject: [PATCH resent] opcodes m68k : fix cfv4e movecr disassembly
Hello list,
Here is resent, now againts cvs, of a patch fixing the names of the movecr
registers when disassembling coldfire v4e (MCF5407/7x/8x/55x) binaries.
Some register names were missing, others have different names on v4e CPUs
than on older m68k CPUs.
Feel free to apply or comment.
Philippe.
opcodes/ChangeLog
2009-08-15 Philippe De Muyter <phdm@macqel.be>
* m68k-dis.c (print_insn_arg): Add movecr register names for
coldfire v4e families.
Index: opcodes/m68k-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/m68k-dis.c,v
retrieving revision 1.31
diff -p -u -r1.31 m68k-dis.c
--- opcodes/m68k-dis.c 26 Nov 2008 10:43:18 -0000 1.31
+++ opcodes/m68k-dis.c 24 Aug 2009 14:20:12 -0000
@@ -699,35 +699,59 @@ print_insn_arg (const char *d,
case 'J':
{
/* FIXME: There's a problem here, different m68k processors call the
- same address different names. This table can't get it right
- because it doesn't know which processor it's disassembling for. */
- static const struct { char *name; int value; } names[]
- = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
+ same address different names. The tables below try to get it right
+ using info->mach, but only for v4e. */
+ struct regname { char *name; int value; };
+ static const struct regname names[] = {
+ {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
{"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
{"%msp", 0x803}, {"%isp", 0x804},
+ {"%pc", 0x80f},
/* reg c04 is sometimes called flashbar or rambar.
rec c05 is also sometimes called rambar. */
{"%rambar0", 0xc04}, {"%rambar1", 0xc05},
+ {"%mbar", 0xc0f},
+
/* Should we be calling this psr like we do in case 'Y'? */
{"%mmusr",0x805},
{"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
/* Fido added these. */
- {"%cac", 0xffe}, {"%mbo", 0xfff}};
+ {"%cac", 0xffe}, {"%mbo", 0xfff}
+ };
+ /* alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least */
+ static const struct regname names_v4e[] = {
+ {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
+ {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
+ };
+ unsigned int arch_mask;
+ arch_mask = bfd_m68k_mach_to_features (info->mach);
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
FETCH_ARG (12, val);
- for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
+ if (arch_mask & (mcfisa_b|mcfisa_c))
+ {
+ for (regno = ARRAY_SIZE(names_v4e); --regno >= 0; )
+ if (names_v4e[regno].value == val)
+ {
+ (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
+ break;
+ }
+ if (regno >= 0)
+ break;
+ }
+ for (regno = ARRAY_SIZE(names) - 1; regno >= 0; regno--)
if (names[regno].value == val)
{
(*info->fprintf_func) (info->stream, "%s", names[regno].name);
break;
}
if (regno < 0)
- (*info->fprintf_func) (info->stream, "%d", val);
+ (*info->fprintf_func) (info->stream, "0x%x", val);
}
break;