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Re: [PATCH] ARM - gas: Maximum alignment size augmented to 64


Thanks Matthias,
  with the latest cvs up, I could reproduce the behavior.

This version of the patch has the dump updated to the new format.

Daniel.

Matthias Klose wrote:
The output of objdump did change,

Disassembly of section .text:
00000000 <foo> f04f 0001        mov.w   r0, #1
00000004 <foo+0x4> 46c0         nop                     ; (mov r8, r8)

so the regexps of the form

00000000 <foo> f04f 0001.*mov.w.*r0, #1.*; 0x1

don't match anymore. change this to

00000000 <foo> f04f 0001.*mov.w.*r0, #1.*

for all four occurrances and the test succeeds.

Matthias

Daniel Gutson schrieb:
Hi Matthias,

I couldn't get the fail, even after updating my sources from mainline.

Could you please provide more details?

Thanks,

Daniel.


Matthias Klose wrote:
Daniel Gutson schrieb:
Hi,
 in the attached patch, the maximum allowed code alignment has been
increased from
32 to 64 bytes. This change affects the .p2align and .align directives
in GAS and the
-falign-functions GCC option.

I tested the code by running the gas testsuite, including the new test
case I added.
the test case does succeed with binutils 20090622 and the patch
applied, it
fails with binutils 20090704 and the patch applied.

Matthias


-- Daniel Gutson CodeSourcery www.codesourcery.com
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Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.393
diff -u -p -r1.393 tc-arm.c
--- gas/config/tc-arm.c	9 Jul 2009 07:52:34 -0000	1.393
+++ gas/config/tc-arm.c	13 Jul 2009 19:02:50 -0000
@@ -18374,9 +18374,15 @@ arm_frag_align_code (int n, int max)
   char * p;
 
   /* We assume that there will never be a requirement
-     to support alignments greater than 32 bytes.  */
+     to support alignments greater than [MAX_MEM_FOR_RS_ALIGN_CODE] bytes.  */
   if (max > MAX_MEM_FOR_RS_ALIGN_CODE)
-    as_fatal (_("alignments greater than 32 bytes not supported in .text sections."));
+    {
+      char err_msg[128];
+      sprintf (err_msg, 
+        _("alignments greater than %d bytes not supported in .text sections."),
+        MAX_MEM_FOR_RS_ALIGN_CODE + 1);
+      as_fatal (err_msg);
+    }
 
   p = frag_var (rs_align_code,
 		MAX_MEM_FOR_RS_ALIGN_CODE,
Index: gas/config/tc-arm.h
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.h,v
retrieving revision 1.51
diff -u -p -r1.51 tc-arm.h
--- gas/config/tc-arm.h	22 Jun 2009 14:40:27 -0000	1.51
+++ gas/config/tc-arm.h	13 Jul 2009 19:02:50 -0000
@@ -191,7 +191,8 @@ void arm_copy_symbol_attributes (symbolS
 
 #define TC_CONS_FIX_NEW cons_fix_new_arm
 
-#define MAX_MEM_FOR_RS_ALIGN_CODE 31
+#define MAX_MEM_ALIGNMENT_BYTES   6
+#define MAX_MEM_FOR_RS_ALIGN_CODE ((1 << MAX_MEM_ALIGNMENT_BYTES) - 1)
 
 /* For frags in code sections we need to record whether they contain
    ARM code or THUMB code.  This is that if they have to be aligned,
Index: gas/testsuite/gas/arm/align64.d
===================================================================
RCS file: gas/testsuite/gas/arm/align64.d
diff -N gas/testsuite/gas/arm/align64.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/align64.d	13 Jul 2009 19:02:50 -0000
@@ -0,0 +1,69 @@
+# name: 64 Bytes alignment test
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+00000000 <foo> f04f 0001.*mov.w.*r0, #1
+00000004 <foo\+0x4> 46c0.*nop.*
+00000006 <foo\+0x6> 46c0.*nop.*
+00000008 <foo\+0x8> 46c0.*nop.*
+0000000a <foo\+0xa> 46c0.*nop.*
+0000000c <foo\+0xc> 46c0.*nop.*
+0000000e <foo\+0xe> 46c0.*nop.*
+00000010 <foo\+0x10> 46c0.*nop.*
+00000012 <foo\+0x12> 46c0.*nop.*
+00000014 <foo\+0x14> 46c0.*nop.*
+00000016 <foo\+0x16> 46c0.*nop.*
+00000018 <foo\+0x18> 46c0.*nop.*
+0000001a <foo\+0x1a> 46c0.*nop.*
+0000001c <foo\+0x1c> 46c0.*nop.*
+0000001e <foo\+0x1e> 46c0.*nop.*
+00000020 <foo\+0x20> 46c0.*nop.*
+00000022 <foo\+0x22> 46c0.*nop.*
+00000024 <foo\+0x24> 46c0.*nop.*
+00000026 <foo\+0x26> 46c0.*nop.*
+00000028 <foo\+0x28> 46c0.*nop.*
+0000002a <foo\+0x2a> 46c0.*nop.*
+0000002c <foo\+0x2c> 46c0.*nop.*
+0000002e <foo\+0x2e> 46c0.*nop.*
+00000030 <foo\+0x30> 46c0.*nop.*
+00000032 <foo\+0x32> 46c0.*nop.*
+00000034 <foo\+0x34> 46c0.*nop.*
+00000036 <foo\+0x36> 46c0.*nop.*
+00000038 <foo\+0x38> 46c0.*nop.*
+0000003a <foo\+0x3a> 46c0.*nop.*
+0000003c <foo\+0x3c> 46c0.*nop.*
+0000003e <foo\+0x3e> 46c0.*nop.*
+00000040 <foo\+0x40> f04f 0002.*mov.w.*r0, #2
+00000044 <foo2> e3a00003.*mov.*r0, #3
+00000048 <foo2\+0x4> e1a00000.*nop.*
+0000004c <foo2\+0x8> e1a00000.*nop.*
+00000050 <foo2\+0xc> e1a00000.*nop.*
+00000054 <foo2\+0x10> e1a00000.*nop.*
+00000058 <foo2\+0x14> e1a00000.*nop.*
+0000005c <foo2\+0x18> e1a00000.*nop.*
+00000060 <foo2\+0x1c> e1a00000.*nop.*
+00000064 <foo2\+0x20> e1a00000.*nop.*
+00000068 <foo2\+0x24> e1a00000.*nop.*
+0000006c <foo2\+0x28> e1a00000.*nop.*
+00000070 <foo2\+0x2c> e1a00000.*nop.*
+00000074 <foo2\+0x30> e1a00000.*nop.*
+00000078 <foo2\+0x34> e1a00000.*nop.*
+0000007c <foo2\+0x38> e1a00000.*nop.*
+00000080 <foo2\+0x3c> e3a00004.*mov.*r0, #4
+00000084 <foo2\+0x40> e1a00000.*nop.*
+00000088 <foo2\+0x44> e1a00000.*nop.*
+0000008c <foo2\+0x48> e1a00000.*nop.*
+00000090 <foo2\+0x4c> e1a00000.*nop.*
+00000094 <foo2\+0x50> e1a00000.*nop.*
+00000098 <foo2\+0x54> e1a00000.*nop.*
+0000009c <foo2\+0x58> e1a00000.*nop.*
+000000a0 <foo2\+0x5c> e1a00000.*nop.*
+000000a4 <foo2\+0x60> e1a00000.*nop.*
+000000a8 <foo2\+0x64> e1a00000.*nop.*
+000000ac <foo2\+0x68> e1a00000.*nop.*
+000000b0 <foo2\+0x6c> e1a00000.*nop.*
+000000b4 <foo2\+0x70> e1a00000.*nop.*
+000000b8 <foo2\+0x74> e1a00000.*nop.*
+000000bc <foo2\+0x78> e1a00000.*nop.*
Index: gas/testsuite/gas/arm/align64.s
===================================================================
RCS file: gas/testsuite/gas/arm/align64.s
diff -N gas/testsuite/gas/arm/align64.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/align64.s	13 Jul 2009 19:02:50 -0000
@@ -0,0 +1,12 @@
+.syntax unified
+.thumb
+foo:
+	mov r0, #1
+.p2align 6,,63
+	mov r0, #2
+
+.arm
+foo2:
+	mov r0, #3
+.p2align 6,,63
+	mov r0, #4

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