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Re: [PATCH] x86/Intel: fix indirect far jmp/call with operand size specified


No, I don't. And I think before we get into further piecemeal someone
needs to sit down and do a catch-all-instructions-and-all-operands kind
of thing. You should realize that intelok.s tests all valid call combinations,
but to avoid pointless duplication (the focus of the test is on checking
that operands get handled correctly, not individual instructions) it
neglects jumps. The base assumption here is that if one was to modify
call operands, one would likewise modify jmp. That apparently hasn't
happened with your operand size handling patch, but fixing this just
as problems are found is inappropriate. (And notice that intelok.s is
already written in that spirit in that it [tries to] cover[s] all possible
operands.)

If I get time to further work on binutils, and if I get past the most
immediate things I want to get done, I would offer to add such a
test for Intel syntax. If a similar thing ought to be done for AT&T,
I would want to defer to you or someone else.

Jan

>>> "H.J. Lu" <hjl.tools@gmail.com> 21.02.08 17:44 >>>
Hi Jan,

Do you have testcases?

H.J.
On Thu, Feb 21, 2008 at 8:19 AM, Jan Beulich <jbeulich@novell.com> wrote:
> Far jumps and calls were broken due to missing permissions to use
>  certain operand size operators on their operands.
>  Additionally, jmp and call, which really behave identically as far as
>  operands are concerned, were out of sync in a few more respects.
>
>  opcodes/
>  2008-02-21  Jan Beulich  <jbeulich@novell.com>
>
>         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
>         and Fword for far indirect jmp. Allow Reg16 and Word for near
>         indirect jmp on x86-64. Disallow Fword for lcall.
>         * i386-tbl.h: Re-generate.
>
>  --- 2008-02-13/opcodes/i386-opc.tbl     2008-02-13 11:13:38.000000000 +0100
>  +++ 2008-02-13/opcodes/i386-opc.tbl     2008-02-21 16:56:08.000000000 +0100
>  @@ -322,17 +322,17 @@ call, 1, 0xff, 0x2, 1, Cpu64, Modrm|Defa
>   // Intel Syntax
>   call, 2, 0x9a, None, 1, CpuNo64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
>   // Intel Syntax
>  -call, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>  +call, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|Fword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>   lcall, 2, 0x9a, None, 1, CpuNo64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
>  -lcall, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Fword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>  +lcall, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>
>   jmp, 1, 0xeb, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32|Disp32S|Disp64 }
>   jmp, 1, 0xff, 0x4, 1, CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|JumpAbsolute }
>  -jmp, 1, 0xff, 0x4, 1, Cpu64, Modrm|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Reg64|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S|JumpAbsolute }
>  +jmp, 1, 0xff, 0x4, 1, Cpu64, Modrm|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S|JumpAbsolute }
>   // Intel Syntax.
>   jmp, 2, 0xea, None, 1, CpuNo64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
>   // Intel Syntax.
>  -jmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>  +jmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|Fword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>   ljmp, 2, 0xea, None, 1, CpuNo64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
>   ljmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
>
>
>
>
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