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[PATCH] enhance register parsing in .cfi_* handling
- From: "Jan Beulich" <jbeulich at novell dot com>
- To: <binutils at sourceware dot org>
- Date: Mon, 11 Feb 2008 10:51:34 +0000
- Subject: [PATCH] enhance register parsing in .cfi_* handling
Allow using register names requiring special parsing as well as
register equates in .cfi_* directives, if the target can support these
(i.e. specifically, if all ways to specify registers are unambiguous).
This requires a new hook, tc_x86_parse_to_dw2regnum(), superceding
tc_x86_regname_to_dw2regnum() and allowing the target to do more
sophisticated parsing of the respective (register) expressions. Use
this on i?86 and x86-64.
Built and tested on i686-pc-linux-gnu and x86_64-unknown-linux-gnu.
gas/
2008-02-11 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-11 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-11 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (next_field): Allow optional (i.e. possibly blank)
fields.
(process_i386_registers): Process new (optional) fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum.
* i386-reg.tbl: Provide initializers for dw2_regnum for all
registers known in Dwarf2. Add pseudo register names for
backward compatibility.
* i386-tbl.h: Re-generate.
--- 2008-02-11/gas/config/tc-i386.c 2008-02-11 08:33:03.000000000 +0100
+++ 2008-02-11/gas/config/tc-i386.c 2008-02-11 10:47:45.000000000 +0100
@@ -413,6 +413,9 @@ static int intel_mnemonic = !SYSV386_COM
/* 1 if support old (<= 2.8.1) versions of gcc. */
static int old_gcc = OLDGCC_COMPAT;
+/* 1 if pseudo registers are permitted. */
+static int allow_pseudo_reg = 0;
+
/* 1 if register prefix % not required. */
static int allow_naked_reg = 0;
@@ -7053,15 +7056,19 @@ parse_real_register (char *reg_string, c
}
}
+ if (r == NULL || allow_pseudo_reg)
+ return r;
+
+ if (UINTS_ALL_ZERO (r->reg_type))
+ return (const reg_entry *) NULL;
+
/* Don't allow fake index register unless allow_index_reg isn't 0. */
- if (r != NULL
- && !allow_index_reg
+ if (!allow_index_reg
&& (r->reg_num == RegEiz || r->reg_num == RegRiz))
return (const reg_entry *) NULL;
- if (r != NULL
- && ((r->reg_flags & (RegRex64 | RegRex))
- || r->reg_type.bitfield.reg64)
+ if (((r->reg_flags & (RegRex64 | RegRex))
+ || r->reg_type.bitfield.reg64)
&& (!cpu_arch_flags.bitfield.cpulm
|| !UINTS_EQUAL (r->reg_type, control))
&& flag_code != CODE_64BIT)
@@ -9132,79 +9139,54 @@ intel_putback_token (void)
prev_token.str = NULL;
}
-int
-tc_x86_regname_to_dw2regnum (char *regname)
+void
+tc_x86_parse_to_dw2regnum (expressionS *exp)
{
- unsigned int regnum;
- unsigned int regnames_count;
- static const char *const regnames_32[] =
- {
- "eax", "ecx", "edx", "ebx",
- "esp", "ebp", "esi", "edi",
- "eip", "eflags", NULL,
- "st0", "st1", "st2", "st3",
- "st4", "st5", "st6", "st7",
- NULL, NULL,
- "xmm0", "xmm1", "xmm2", "xmm3",
- "xmm4", "xmm5", "xmm6", "xmm7",
- "mm0", "mm1", "mm2", "mm3",
- "mm4", "mm5", "mm6", "mm7",
- "fcw", "fsw", "mxcsr",
- "es", "cs", "ss", "ds", "fs", "gs", NULL, NULL,
- "tr", "ldtr"
- };
- static const char *const regnames_64[] =
- {
- "rax", "rdx", "rcx", "rbx",
- "rsi", "rdi", "rbp", "rsp",
- "r8", "r9", "r10", "r11",
- "r12", "r13", "r14", "r15",
- "rip",
- "xmm0", "xmm1", "xmm2", "xmm3",
- "xmm4", "xmm5", "xmm6", "xmm7",
- "xmm8", "xmm9", "xmm10", "xmm11",
- "xmm12", "xmm13", "xmm14", "xmm15",
- "st0", "st1", "st2", "st3",
- "st4", "st5", "st6", "st7",
- "mm0", "mm1", "mm2", "mm3",
- "mm4", "mm5", "mm6", "mm7",
- "rflags",
- "es", "cs", "ss", "ds", "fs", "gs", NULL, NULL,
- "fs.base", "gs.base", NULL, NULL,
- "tr", "ldtr",
- "mxcsr", "fcw", "fsw"
- };
- const char *const *regnames;
+ int saved_naked_reg;
+ char saved_register_dot;
- if (flag_code == CODE_64BIT)
- {
- regnames = regnames_64;
- regnames_count = ARRAY_SIZE (regnames_64);
- }
- else
- {
- regnames = regnames_32;
- regnames_count = ARRAY_SIZE (regnames_32);
+ saved_naked_reg = allow_naked_reg;
+ allow_naked_reg = 1;
+ saved_register_dot = register_chars['.'];
+ register_chars['.'] = '.';
+ allow_pseudo_reg = 1;
+ expression_and_evaluate (exp);
+ allow_pseudo_reg = 0;
+ register_chars['.'] = saved_register_dot;
+ allow_naked_reg = saved_naked_reg;
+
+ if (exp->X_op == O_register && exp->X_add_number >= 0)
+ {
+ if ((addressT) exp->X_add_number < i386_regtab_size)
+ {
+ exp->X_op = O_constant;
+ exp->X_add_number = i386_regtab[exp->X_add_number]
+ .dw2_regnum[flag_code >> 1];
+ }
+ else
+ exp->X_op = O_illegal;
}
-
- for (regnum = 0; regnum < regnames_count; regnum++)
- if (regnames[regnum] != NULL
- && strcmp (regname, regnames[regnum]) == 0)
- return regnum;
-
- return -1;
}
void
tc_x86_frame_initial_instructions (void)
{
- static unsigned int sp_regno;
+ static unsigned int sp_regno[2];
+
+ if (!sp_regno[flag_code >> 1])
+ {
+ char *saved_input = input_line_pointer;
+ char sp[][4] = {"esp", "rsp"};
+ expressionS exp;
- if (!sp_regno)
- sp_regno = tc_x86_regname_to_dw2regnum (flag_code == CODE_64BIT
- ? "rsp" : "esp");
+ input_line_pointer = sp[flag_code >> 1];
+ tc_x86_parse_to_dw2regnum (&exp);
+ assert (exp.X_op == O_constant);
+ sp_regno[flag_code >> 1] = exp.X_add_number;
+ input_line_pointer = saved_input;
+ }
- cfi_add_CFA_def_cfa (sp_regno, -x86_cie_data_alignment);
+ cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_data_alignment);
cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_data_alignment);
}
--- 2008-02-11/gas/config/tc-i386.h 2008-02-11 08:33:03.000000000 +0100
+++ 2008-02-11/gas/config/tc-i386.h 2008-02-11 10:27:10.000000000 +0100
@@ -203,8 +203,8 @@ extern unsigned int x86_dwarf2_return_co
extern int x86_cie_data_alignment;
#define DWARF2_CIE_DATA_ALIGNMENT x86_cie_data_alignment
-#define tc_regname_to_dw2regnum tc_x86_regname_to_dw2regnum
-extern int tc_x86_regname_to_dw2regnum (char *);
+#define tc_parse_to_dw2regnum tc_x86_parse_to_dw2regnum
+extern void tc_x86_parse_to_dw2regnum (expressionS *);
#define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions
extern void tc_x86_frame_initial_instructions (void);
--- 2008-02-11/gas/dw2gencfi.c 2007-09-24 17:07:15.000000000 +0200
+++ 2008-02-11/gas/dw2gencfi.c 2008-02-11 10:27:10.000000000 +0100
@@ -400,13 +400,11 @@ cfi_parse_separator (void)
as_bad (_("missing separator"));
}
-static unsigned
-cfi_parse_reg (void)
+#ifndef tc_parse_to_dw2regnum
+static void
+tc_parse_to_dw2regnum(expressionS *exp)
{
- int regno;
- expressionS exp;
-
-#ifdef tc_regname_to_dw2regnum
+# ifdef tc_regname_to_dw2regnum
SKIP_WHITESPACE ();
if (is_name_beginner (*input_line_pointer)
|| (*input_line_pointer == '%'
@@ -417,18 +415,24 @@ cfi_parse_reg (void)
name = input_line_pointer;
c = get_symbol_end ();
- if ((regno = tc_regname_to_dw2regnum (name)) < 0)
- {
- as_bad (_("bad register expression"));
- regno = 0;
- }
+ exp->X_op = O_constant;
+ exp->X_add_number = tc_regname_to_dw2regnum (name);
*input_line_pointer = c;
- return regno;
}
+ else
+# endif
+ expression_and_evaluate (exp);
+}
#endif
- expression_and_evaluate (&exp);
+static unsigned
+cfi_parse_reg (void)
+{
+ int regno;
+ expressionS exp;
+
+ tc_parse_to_dw2regnum (&exp);
switch (exp.X_op)
{
case O_register:
@@ -437,9 +441,14 @@ cfi_parse_reg (void)
break;
default:
+ regno = -1;
+ break;
+ }
+
+ if (regno < 0)
+ {
as_bad (_("bad register expression"));
regno = 0;
- break;
}
return regno;
--- 2008-02-11/gas/testsuite/gas/cfi/cfi-i386.d 2008-02-11 08:33:04.000000000 +0100
+++ 2008-02-11/gas/testsuite/gas/cfi/cfi-i386.d 2008-02-11 11:07:32.000000000 +0100
@@ -46,3 +46,107 @@ The section .eh_frame contains:
DW_CFA_nop
DW_CFA_nop
+0000008c 00000010 00000000 CIE
+ Version: 1
+ Augmentation: "zR"
+ Code alignment factor: 1
+ Data alignment factor: -4
+ Return address column: 8
+ Augmentation data: 1b
+
+ DW_CFA_undefined: r8 \(eip\)
+ DW_CFA_nop
+
+000000a0 00000094 00000018 FDE cie=0000008c pc=00000044..00000071
+ DW_CFA_advance_loc: 1 to 00000045
+ DW_CFA_undefined: r0 \(eax\)
+ DW_CFA_advance_loc: 1 to 00000046
+ DW_CFA_undefined: r1 \(ecx\)
+ DW_CFA_advance_loc: 1 to 00000047
+ DW_CFA_undefined: r2 \(edx\)
+ DW_CFA_advance_loc: 1 to 00000048
+ DW_CFA_undefined: r3 \(ebx\)
+ DW_CFA_advance_loc: 1 to 00000049
+ DW_CFA_undefined: r4 \(esp\)
+ DW_CFA_advance_loc: 1 to 0000004a
+ DW_CFA_undefined: r5 \(ebp\)
+ DW_CFA_advance_loc: 1 to 0000004b
+ DW_CFA_undefined: r6 \(esi\)
+ DW_CFA_advance_loc: 1 to 0000004c
+ DW_CFA_undefined: r7 \(edi\)
+ DW_CFA_advance_loc: 1 to 0000004d
+ DW_CFA_undefined: r9 \(eflags\)
+ DW_CFA_advance_loc: 1 to 0000004e
+ DW_CFA_undefined: r40 \(es\)
+ DW_CFA_advance_loc: 1 to 0000004f
+ DW_CFA_undefined: r41 \(cs\)
+ DW_CFA_advance_loc: 1 to 00000050
+ DW_CFA_undefined: r43 \(ds\)
+ DW_CFA_advance_loc: 1 to 00000051
+ DW_CFA_undefined: r42 \(ss\)
+ DW_CFA_advance_loc: 1 to 00000052
+ DW_CFA_undefined: r44 \(fs\)
+ DW_CFA_advance_loc: 1 to 00000053
+ DW_CFA_undefined: r45 \(gs\)
+ DW_CFA_advance_loc: 1 to 00000054
+ DW_CFA_undefined: r48 \(tr\)
+ DW_CFA_advance_loc: 1 to 00000055
+ DW_CFA_undefined: r49 \(ldtr\)
+ DW_CFA_advance_loc: 1 to 00000056
+ DW_CFA_undefined: r39 \(mxcsr\)
+ DW_CFA_advance_loc: 1 to 00000057
+ DW_CFA_undefined: r21 \(xmm0\)
+ DW_CFA_advance_loc: 1 to 00000058
+ DW_CFA_undefined: r22 \(xmm1\)
+ DW_CFA_advance_loc: 1 to 00000059
+ DW_CFA_undefined: r23 \(xmm2\)
+ DW_CFA_advance_loc: 1 to 0000005a
+ DW_CFA_undefined: r24 \(xmm3\)
+ DW_CFA_advance_loc: 1 to 0000005b
+ DW_CFA_undefined: r25 \(xmm4\)
+ DW_CFA_advance_loc: 1 to 0000005c
+ DW_CFA_undefined: r26 \(xmm5\)
+ DW_CFA_advance_loc: 1 to 0000005d
+ DW_CFA_undefined: r27 \(xmm6\)
+ DW_CFA_advance_loc: 1 to 0000005e
+ DW_CFA_undefined: r28 \(xmm7\)
+ DW_CFA_advance_loc: 1 to 0000005f
+ DW_CFA_undefined: r37 \(fcw\)
+ DW_CFA_advance_loc: 1 to 00000060
+ DW_CFA_undefined: r38 \(fsw\)
+ DW_CFA_advance_loc: 1 to 00000061
+ DW_CFA_undefined: r11 \(st\(?0?\)?\)
+ DW_CFA_advance_loc: 1 to 00000062
+ DW_CFA_undefined: r12 \(st\(?1\)?\)
+ DW_CFA_advance_loc: 1 to 00000063
+ DW_CFA_undefined: r13 \(st\(?2\)?\)
+ DW_CFA_advance_loc: 1 to 00000064
+ DW_CFA_undefined: r14 \(st\(?3\)?\)
+ DW_CFA_advance_loc: 1 to 00000065
+ DW_CFA_undefined: r15 \(st\(?4\)?\)
+ DW_CFA_advance_loc: 1 to 00000066
+ DW_CFA_undefined: r16 \(st\(?5\)?\)
+ DW_CFA_advance_loc: 1 to 00000067
+ DW_CFA_undefined: r17 \(st\(?6\)?\)
+ DW_CFA_advance_loc: 1 to 00000068
+ DW_CFA_undefined: r18 \(st\(?7\)?\)
+ DW_CFA_advance_loc: 1 to 00000069
+ DW_CFA_undefined: r29 \(mm0\)
+ DW_CFA_advance_loc: 1 to 0000006a
+ DW_CFA_undefined: r30 \(mm1\)
+ DW_CFA_advance_loc: 1 to 0000006b
+ DW_CFA_undefined: r31 \(mm2\)
+ DW_CFA_advance_loc: 1 to 0000006c
+ DW_CFA_undefined: r32 \(mm3\)
+ DW_CFA_advance_loc: 1 to 0000006d
+ DW_CFA_undefined: r33 \(mm4\)
+ DW_CFA_advance_loc: 1 to 0000006e
+ DW_CFA_undefined: r34 \(mm5\)
+ DW_CFA_advance_loc: 1 to 0000006f
+ DW_CFA_undefined: r35 \(mm6\)
+ DW_CFA_advance_loc: 1 to 00000070
+ DW_CFA_undefined: r36 \(mm7\)
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+
--- 2008-02-11/gas/testsuite/gas/cfi/cfi-i386.s 2003-05-20 10:01:19.000000000 +0200
+++ 2008-02-11/gas/testsuite/gas/cfi/cfi-i386.s 2008-02-11 10:27:10.000000000 +0100
@@ -1,5 +1,3 @@
-#; $ as -o test.o gas-cfi-test.s && gcc -nostdlib -o test test.o
-
.text
#; func_locvars
@@ -52,7 +50,7 @@ func_prologue:
#; func_otherreg
#; - function that moves frame pointer to
-#; another register (r12) and then allocates
+#; another register (ebx) and then allocates
#; a space for local variables
.type func_otherreg,@function
@@ -65,14 +63,14 @@ func_otherreg:
#; alocate space for local vars
#; (no .cfi_{def,adjust}_cfa_offset here,
- #; because CFA is computed from r12!)
+ #; because CFA is computed from ebx!)
sub $100,%esp
#; function body
call func_prologue
add $2, %eax
- #; restore frame pointer from r12
+ #; restore frame pointer from ebx
mov %ebx,%esp
.cfi_def_cfa esp,4
ret
@@ -105,3 +103,63 @@ _start:
int $0x80
hlt
.cfi_endproc
+
+#; func_all_registers
+#; - test for all .cfi register numbers.
+#; This function is never called and the CFI info doesn't make sense.
+
+ .type func_all_registers,@function
+func_all_registers:
+ .cfi_startproc simple
+
+ .cfi_undefined eip ; nop
+ .cfi_undefined eax ; nop
+ .cfi_undefined ecx ; nop
+ .cfi_undefined edx ; nop
+ .cfi_undefined ebx ; nop
+ .cfi_undefined esp ; nop
+ .cfi_undefined ebp ; nop
+ .cfi_undefined esi ; nop
+ .cfi_undefined edi ; nop
+ .cfi_undefined eflags ; nop
+
+ .cfi_undefined es ; nop
+ .cfi_undefined cs ; nop
+ .cfi_undefined ds ; nop
+ .cfi_undefined ss ; nop
+ .cfi_undefined fs ; nop
+ .cfi_undefined gs ; nop
+ .cfi_undefined tr ; nop
+ .cfi_undefined ldtr ; nop
+
+ .cfi_undefined mxcsr ; nop
+ .cfi_undefined xmm0 ; nop
+ .cfi_undefined xmm1 ; nop
+ .cfi_undefined xmm2 ; nop
+ .cfi_undefined xmm3 ; nop
+ .cfi_undefined xmm4 ; nop
+ .cfi_undefined xmm5 ; nop
+ .cfi_undefined xmm6 ; nop
+ .cfi_undefined xmm7 ; nop
+
+ .cfi_undefined fcw ; nop
+ .cfi_undefined fsw ; nop
+ .cfi_undefined st ; nop
+ .cfi_undefined st(1) ; nop
+ .cfi_undefined st(2) ; nop
+ .cfi_undefined st(3) ; nop
+ .cfi_undefined st(4) ; nop
+ .cfi_undefined st(5) ; nop
+ .cfi_undefined st(6) ; nop
+ .cfi_undefined st(7) ; nop
+
+ .cfi_undefined mm0 ; nop
+ .cfi_undefined mm1 ; nop
+ .cfi_undefined mm2 ; nop
+ .cfi_undefined mm3 ; nop
+ .cfi_undefined mm4 ; nop
+ .cfi_undefined mm5 ; nop
+ .cfi_undefined mm6 ; nop
+ .cfi_undefined mm7 ; nop
+
+ .cfi_endproc
--- 2008-02-11/gas/testsuite/gas/cfi/cfi-x86_64.d 2008-02-11 08:33:04.000000000 +0100
+++ 2008-02-11/gas/testsuite/gas/cfi/cfi-x86_64.d 2008-02-11 11:25:58.000000000 +0100
@@ -60,7 +60,7 @@ The section .eh_frame contains:
DW_CFA_def_cfa: r7 \(rsp\) ofs 8
-000000a4 00000030 00000018 FDE cie=00000090 pc=0000004d..00000058
+000000a4 0000002c 00000018 FDE cie=00000090 pc=0000004d..00000058
DW_CFA_advance_loc: 1 to 0000004e
DW_CFA_def_cfa_offset: 16
DW_CFA_advance_loc: 1 to 0000004f
@@ -82,6 +82,144 @@ The section .eh_frame contains:
DW_CFA_advance_loc: 1 to 00000057
DW_CFA_restore_state
DW_CFA_nop
+
+000000d4 00000010 00000000 CIE
+ Version: 1
+ Augmentation: "zR"
+ Code alignment factor: 1
+ Data alignment factor: -8
+ Return address column: 16
+ Augmentation data: 1b
+
+ DW_CFA_undefined: r16 \(rip\)
+ DW_CFA_nop
+
+000000e8 000000cc 00000018 FDE cie=000000d4 pc=00000058..00000097
+ DW_CFA_advance_loc: 1 to 00000059
+ DW_CFA_undefined: r0 \(rax\)
+ DW_CFA_advance_loc: 1 to 0000005a
+ DW_CFA_undefined: r2 \(rcx\)
+ DW_CFA_advance_loc: 1 to 0000005b
+ DW_CFA_undefined: r1 \(rdx\)
+ DW_CFA_advance_loc: 1 to 0000005c
+ DW_CFA_undefined: r3 \(rbx\)
+ DW_CFA_advance_loc: 1 to 0000005d
+ DW_CFA_undefined: r7 \(rsp\)
+ DW_CFA_advance_loc: 1 to 0000005e
+ DW_CFA_undefined: r6 \(rbp\)
+ DW_CFA_advance_loc: 1 to 0000005f
+ DW_CFA_undefined: r4 \(rsi\)
+ DW_CFA_advance_loc: 1 to 00000060
+ DW_CFA_undefined: r5 \(rdi\)
+ DW_CFA_advance_loc: 1 to 00000061
+ DW_CFA_undefined: r8 \(r8\)
+ DW_CFA_advance_loc: 1 to 00000062
+ DW_CFA_undefined: r9 \(r9\)
+ DW_CFA_advance_loc: 1 to 00000063
+ DW_CFA_undefined: r10 \(r10\)
+ DW_CFA_advance_loc: 1 to 00000064
+ DW_CFA_undefined: r11 \(r11\)
+ DW_CFA_advance_loc: 1 to 00000065
+ DW_CFA_undefined: r12 \(r12\)
+ DW_CFA_advance_loc: 1 to 00000066
+ DW_CFA_undefined: r13 \(r13\)
+ DW_CFA_advance_loc: 1 to 00000067
+ DW_CFA_undefined: r14 \(r14\)
+ DW_CFA_advance_loc: 1 to 00000068
+ DW_CFA_undefined: r15 \(r15\)
+ DW_CFA_advance_loc: 1 to 00000069
+ DW_CFA_undefined: r49 \([er]flags\)
+ DW_CFA_advance_loc: 1 to 0000006a
+ DW_CFA_undefined: r50 \(es\)
+ DW_CFA_advance_loc: 1 to 0000006b
+ DW_CFA_undefined: r51 \(cs\)
+ DW_CFA_advance_loc: 1 to 0000006c
+ DW_CFA_undefined: r53 \(ds\)
+ DW_CFA_advance_loc: 1 to 0000006d
+ DW_CFA_undefined: r52 \(ss\)
+ DW_CFA_advance_loc: 1 to 0000006e
+ DW_CFA_undefined: r54 \(fs\)
+ DW_CFA_advance_loc: 1 to 0000006f
+ DW_CFA_undefined: r55 \(gs\)
+ DW_CFA_advance_loc: 1 to 00000070
+ DW_CFA_undefined: r62 \(tr\)
+ DW_CFA_advance_loc: 1 to 00000071
+ DW_CFA_undefined: r63 \(ldtr\)
+ DW_CFA_advance_loc: 1 to 00000072
+ DW_CFA_undefined: r58 \(fs\.base\)
+ DW_CFA_advance_loc: 1 to 00000073
+ DW_CFA_undefined: r59 \(gs\.base\)
+ DW_CFA_advance_loc: 1 to 00000074
+ DW_CFA_undefined: r64 \(mxcsr\)
+ DW_CFA_advance_loc: 1 to 00000075
+ DW_CFA_undefined: r17 \(xmm0\)
+ DW_CFA_advance_loc: 1 to 00000076
+ DW_CFA_undefined: r18 \(xmm1\)
+ DW_CFA_advance_loc: 1 to 00000077
+ DW_CFA_undefined: r19 \(xmm2\)
+ DW_CFA_advance_loc: 1 to 00000078
+ DW_CFA_undefined: r20 \(xmm3\)
+ DW_CFA_advance_loc: 1 to 00000079
+ DW_CFA_undefined: r21 \(xmm4\)
+ DW_CFA_advance_loc: 1 to 0000007a
+ DW_CFA_undefined: r22 \(xmm5\)
+ DW_CFA_advance_loc: 1 to 0000007b
+ DW_CFA_undefined: r23 \(xmm6\)
+ DW_CFA_advance_loc: 1 to 0000007c
+ DW_CFA_undefined: r24 \(xmm7\)
+ DW_CFA_advance_loc: 1 to 0000007d
+ DW_CFA_undefined: r25 \(xmm8\)
+ DW_CFA_advance_loc: 1 to 0000007e
+ DW_CFA_undefined: r26 \(xmm9\)
+ DW_CFA_advance_loc: 1 to 0000007f
+ DW_CFA_undefined: r27 \(xmm10\)
+ DW_CFA_advance_loc: 1 to 00000080
+ DW_CFA_undefined: r28 \(xmm11\)
+ DW_CFA_advance_loc: 1 to 00000081
+ DW_CFA_undefined: r29 \(xmm12\)
+ DW_CFA_advance_loc: 1 to 00000082
+ DW_CFA_undefined: r30 \(xmm13\)
+ DW_CFA_advance_loc: 1 to 00000083
+ DW_CFA_undefined: r31 \(xmm14\)
+ DW_CFA_advance_loc: 1 to 00000084
+ DW_CFA_undefined: r32 \(xmm15\)
+ DW_CFA_advance_loc: 1 to 00000085
+ DW_CFA_undefined: r65 \(fcw\)
+ DW_CFA_advance_loc: 1 to 00000086
+ DW_CFA_undefined: r66 \(fsw\)
+ DW_CFA_advance_loc: 1 to 00000087
+ DW_CFA_undefined: r33 \(st\(?0?\)?\)
+ DW_CFA_advance_loc: 1 to 00000088
+ DW_CFA_undefined: r34 \(st\(?1\)?\)
+ DW_CFA_advance_loc: 1 to 00000089
+ DW_CFA_undefined: r35 \(st\(?2\)?\)
+ DW_CFA_advance_loc: 1 to 0000008a
+ DW_CFA_undefined: r36 \(st\(?3\)?\)
+ DW_CFA_advance_loc: 1 to 0000008b
+ DW_CFA_undefined: r37 \(st\(?4\)?\)
+ DW_CFA_advance_loc: 1 to 0000008c
+ DW_CFA_undefined: r38 \(st\(?5\)?\)
+ DW_CFA_advance_loc: 1 to 0000008d
+ DW_CFA_undefined: r39 \(st\(?6\)?\)
+ DW_CFA_advance_loc: 1 to 0000008e
+ DW_CFA_undefined: r40 \(st\(?7\)?\)
+ DW_CFA_advance_loc: 1 to 0000008f
+ DW_CFA_undefined: r41 \(mm0\)
+ DW_CFA_advance_loc: 1 to 00000090
+ DW_CFA_undefined: r42 \(mm1\)
+ DW_CFA_advance_loc: 1 to 00000091
+ DW_CFA_undefined: r43 \(mm2\)
+ DW_CFA_advance_loc: 1 to 00000092
+ DW_CFA_undefined: r44 \(mm3\)
+ DW_CFA_advance_loc: 1 to 00000093
+ DW_CFA_undefined: r45 \(mm4\)
+ DW_CFA_advance_loc: 1 to 00000094
+ DW_CFA_undefined: r46 \(mm5\)
+ DW_CFA_advance_loc: 1 to 00000095
+ DW_CFA_undefined: r47 \(mm6\)
+ DW_CFA_advance_loc: 1 to 00000096
+ DW_CFA_undefined: r48 \(mm7\)
+ DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
--- 2008-02-11/gas/testsuite/gas/cfi/cfi-x86_64.s 2007-06-18 09:23:34.000000000 +0200
+++ 2008-02-11/gas/testsuite/gas/cfi/cfi-x86_64.s 2008-02-11 10:27:10.000000000 +0100
@@ -1,5 +1,3 @@
-#; $ as -o test.o gas-cfi-test.s && gcc -nostdlib -o test test.o
-
.text
#; func_locvars
@@ -136,3 +134,81 @@ func_alldirectives:
.cfi_restore_state
ret
.cfi_endproc
+
+#; func_all_registers
+#; - test for all .cfi register numbers.
+#; This function is never called and the CFI info doesn't make sense.
+
+ .type func_all_registers,@function
+func_all_registers:
+ .cfi_startproc simple
+
+ .cfi_undefined rip ; nop
+ .cfi_undefined rax ; nop
+ .cfi_undefined rcx ; nop
+ .cfi_undefined rdx ; nop
+ .cfi_undefined rbx ; nop
+ .cfi_undefined rsp ; nop
+ .cfi_undefined rbp ; nop
+ .cfi_undefined rsi ; nop
+ .cfi_undefined rdi ; nop
+ .cfi_undefined r8 ; nop
+ .cfi_undefined r9 ; nop
+ .cfi_undefined r10 ; nop
+ .cfi_undefined r11 ; nop
+ .cfi_undefined r12 ; nop
+ .cfi_undefined r13 ; nop
+ .cfi_undefined r14 ; nop
+ .cfi_undefined r15 ; nop
+ .cfi_undefined rflags ; nop
+
+ .cfi_undefined es ; nop
+ .cfi_undefined cs ; nop
+ .cfi_undefined ds ; nop
+ .cfi_undefined ss ; nop
+ .cfi_undefined fs ; nop
+ .cfi_undefined gs ; nop
+ .cfi_undefined tr ; nop
+ .cfi_undefined ldtr ; nop
+ .cfi_undefined fs.base ; nop
+ .cfi_undefined gs.base ; nop
+
+ .cfi_undefined mxcsr ; nop
+ .cfi_undefined xmm0 ; nop
+ .cfi_undefined xmm1 ; nop
+ .cfi_undefined xmm2 ; nop
+ .cfi_undefined xmm3 ; nop
+ .cfi_undefined xmm4 ; nop
+ .cfi_undefined xmm5 ; nop
+ .cfi_undefined xmm6 ; nop
+ .cfi_undefined xmm7 ; nop
+ .cfi_undefined xmm8 ; nop
+ .cfi_undefined xmm9 ; nop
+ .cfi_undefined xmm10 ; nop
+ .cfi_undefined xmm11 ; nop
+ .cfi_undefined xmm12 ; nop
+ .cfi_undefined xmm13 ; nop
+ .cfi_undefined xmm14 ; nop
+ .cfi_undefined xmm15 ; nop
+
+ .cfi_undefined fcw ; nop
+ .cfi_undefined fsw ; nop
+ .cfi_undefined st ; nop
+ .cfi_undefined st(1) ; nop
+ .cfi_undefined st(2) ; nop
+ .cfi_undefined st(3) ; nop
+ .cfi_undefined st(4) ; nop
+ .cfi_undefined st(5) ; nop
+ .cfi_undefined st(6) ; nop
+ .cfi_undefined st(7) ; nop
+
+ .cfi_undefined mm0 ; nop
+ .cfi_undefined mm1 ; nop
+ .cfi_undefined mm2 ; nop
+ .cfi_undefined mm3 ; nop
+ .cfi_undefined mm4 ; nop
+ .cfi_undefined mm5 ; nop
+ .cfi_undefined mm6 ; nop
+ .cfi_undefined mm7 ; nop
+
+ .cfi_endproc
--- 2008-02-11/opcodes/i386-gen.c 2008-02-11 08:33:30.000000000 +0100
+++ 2008-02-11/opcodes/i386-gen.c 2008-02-11 10:27:10.000000000 +0100
@@ -436,10 +436,15 @@ next_field (char *str, char sep, char **
p = remove_leading_whitespaces (str);
for (str = p; *str != sep && *str != '\0'; str++);
- *str = '\0';
- remove_trailing_whitespaces (p);
+ if (*str == '\0')
+ *next = str;
+ else
+ {
+ *str = '\0';
+ *next = str + 1;
+ }
- *next = str + 1;
+ remove_trailing_whitespaces (p);
return p;
}
@@ -799,6 +804,7 @@ process_i386_registers (FILE *table)
char buf[2048];
char *str, *p, *last;
char *reg_name, *reg_type, *reg_flags, *reg_num;
+ char *dw2_32_num, *dw2_64_num;
filename = "i386-reg.tbl";
fp = fopen (filename, "r");
@@ -864,7 +870,24 @@ process_i386_registers (FILE *table)
process_i386_operand_type (table, reg_type, 0, "\t");
- fprintf (table, ",\n %s, %s },\n", reg_flags, reg_num);
+ /* Find 32-bit Dwarf2 register number. */
+ if (str < last)
+ dw2_32_num = next_field (str, ',', &str);
+ else
+ dw2_32_num = "";
+ if (!*dw2_32_num)
+ dw2_32_num = "-1";
+
+ /* Find 64-bit Dwarf2 register number. */
+ if (str < last)
+ dw2_64_num = next_field (str, ',', &str);
+ else
+ dw2_64_num = "";
+ if (!*dw2_64_num)
+ dw2_64_num = "-1";
+
+ fprintf (table, ",\n %s, %s, { %s, %s } },\n",
+ reg_flags, reg_num, dw2_32_num, dw2_64_num);
}
fclose (fp);
--- 2008-02-11/opcodes/i386-opc.h 2008-02-11 08:33:30.000000000 +0100
+++ 2008-02-11/opcodes/i386-opc.h 2008-02-11 10:27:10.000000000 +0100
@@ -489,15 +489,16 @@ typedef struct
{
char *reg_name;
i386_operand_type reg_type;
- unsigned int reg_flags;
+ unsigned char reg_flags;
#define RegRex 0x1 /* Extended register. */
#define RegRex64 0x2 /* Extended 8 bit register. */
- unsigned int reg_num;
-#define RegRip ((unsigned int ) ~0)
+ unsigned char reg_num;
+#define RegRip ((unsigned char ) ~0)
#define RegEip (RegRip - 1)
/* EIZ and RIZ are fake index registers. */
#define RegEiz (RegEip - 1)
#define RegRiz (RegEiz - 1)
+ signed char dw2_regnum[2];
}
reg_entry;
--- 2008-02-11/opcodes/i386-reg.tbl 2008-02-11 08:33:30.000000000 +0100
+++ 2008-02-11/opcodes/i386-reg.tbl 2008-02-11 10:27:10.000000000 +0100
@@ -20,7 +20,7 @@
// 02110-1301, USA.
// Make %st first as we test for it.
-st, FloatReg|FloatAcc, 0, 0
+st, FloatReg|FloatAcc, 0, 0, 11, 33
// 8 bit regs
al, Reg8|Acc|Byte, 0, 0
cl, Reg8|ShiftCount, 0, 1
@@ -64,14 +64,14 @@ r13w, Reg16, RegRex, 5
r14w, Reg16, RegRex, 6
r15w, Reg16, RegRex, 7
// 32 bit regs
-eax, Reg32|BaseIndex|Acc|Dword, 0, 0
-ecx, Reg32|BaseIndex, 0, 1
-edx, Reg32|BaseIndex, 0, 2
-ebx, Reg32|BaseIndex, 0, 3
-esp, Reg32, 0, 4
-ebp, Reg32|BaseIndex, 0, 5
-esi, Reg32|BaseIndex, 0, 6
-edi, Reg32|BaseIndex, 0, 7
+eax, Reg32|BaseIndex|Acc|Dword, 0, 0, 0
+ecx, Reg32|BaseIndex, 0, 1, 1
+edx, Reg32|BaseIndex, 0, 2, 2
+ebx, Reg32|BaseIndex, 0, 3, 3
+esp, Reg32, 0, 4, 4
+ebp, Reg32|BaseIndex, 0, 5, 5
+esi, Reg32|BaseIndex, 0, 6, 6
+edi, Reg32|BaseIndex, 0, 7, 7
r8d, Reg32|BaseIndex, RegRex, 0
r9d, Reg32|BaseIndex, RegRex, 1
r10d, Reg32|BaseIndex, RegRex, 2
@@ -80,29 +80,29 @@ r12d, Reg32|BaseIndex, RegRex, 4
r13d, Reg32|BaseIndex, RegRex, 5
r14d, Reg32|BaseIndex, RegRex, 6
r15d, Reg32|BaseIndex, RegRex, 7
-rax, Reg64|BaseIndex|Acc|Qword, 0, 0
-rcx, Reg64|BaseIndex, 0, 1
-rdx, Reg64|BaseIndex, 0, 2
-rbx, Reg64|BaseIndex, 0, 3
-rsp, Reg64, 0, 4
-rbp, Reg64|BaseIndex, 0, 5
-rsi, Reg64|BaseIndex, 0, 6
-rdi, Reg64|BaseIndex, 0, 7
-r8, Reg64|BaseIndex, RegRex, 0
-r9, Reg64|BaseIndex, RegRex, 1
-r10, Reg64|BaseIndex, RegRex, 2
-r11, Reg64|BaseIndex, RegRex, 3
-r12, Reg64|BaseIndex, RegRex, 4
-r13, Reg64|BaseIndex, RegRex, 5
-r14, Reg64|BaseIndex, RegRex, 6
-r15, Reg64|BaseIndex, RegRex, 7
+rax, Reg64|BaseIndex|Acc|Qword, 0, 0, , 0
+rcx, Reg64|BaseIndex, 0, 1, , 2
+rdx, Reg64|BaseIndex, 0, 2, , 1
+rbx, Reg64|BaseIndex, 0, 3, , 3
+rsp, Reg64, 0, 4, , 7
+rbp, Reg64|BaseIndex, 0, 5, , 6
+rsi, Reg64|BaseIndex, 0, 6, , 4
+rdi, Reg64|BaseIndex, 0, 7, , 5
+r8, Reg64|BaseIndex, RegRex, 0, , 8
+r9, Reg64|BaseIndex, RegRex, 1, , 9
+r10, Reg64|BaseIndex, RegRex, 2, , 10
+r11, Reg64|BaseIndex, RegRex, 3, , 11
+r12, Reg64|BaseIndex, RegRex, 4, , 12
+r13, Reg64|BaseIndex, RegRex, 5, , 13
+r14, Reg64|BaseIndex, RegRex, 6, , 14
+r15, Reg64|BaseIndex, RegRex, 7, , 15
// Segment registers.
-es, SReg2, 0, 0
-cs, SReg2, 0, 1
-ss, SReg2, 0, 2
-ds, SReg2, 0, 3
-fs, SReg3, 0, 4
-gs, SReg3, 0, 5
+es, SReg2, 0, 0, 40, 50
+cs, SReg2, 0, 1, 41, 51
+ss, SReg2, 0, 2, 42, 52
+ds, SReg2, 0, 3, 43, 53
+fs, SReg3, 0, 4, 44, 54
+gs, SReg3, 0, 5, 45, 55
// Control registers.
cr0, Control, 0, 0
cr1, Control, 0, 1
@@ -163,44 +163,62 @@ tr5, Test, 0, 5
tr6, Test, 0, 6
tr7, Test, 0, 7
// MMX and simd registers.
-mm0, RegMMX, 0, 0
-mm1, RegMMX, 0, 1
-mm2, RegMMX, 0, 2
-mm3, RegMMX, 0, 3
-mm4, RegMMX, 0, 4
-mm5, RegMMX, 0, 5
-mm6, RegMMX, 0, 6
-mm7, RegMMX, 0, 7
-xmm0, RegXMM, 0, 0
-xmm1, RegXMM, 0, 1
-xmm2, RegXMM, 0, 2
-xmm3, RegXMM, 0, 3
-xmm4, RegXMM, 0, 4
-xmm5, RegXMM, 0, 5
-xmm6, RegXMM, 0, 6
-xmm7, RegXMM, 0, 7
-xmm8, RegXMM, RegRex, 0
-xmm9, RegXMM, RegRex, 1
-xmm10, RegXMM, RegRex, 2
-xmm11, RegXMM, RegRex, 3
-xmm12, RegXMM, RegRex, 4
-xmm13, RegXMM, RegRex, 5
-xmm14, RegXMM, RegRex, 6
-xmm15, RegXMM, RegRex, 7
+mm0, RegMMX, 0, 0, 29, 41
+mm1, RegMMX, 0, 1, 30, 42
+mm2, RegMMX, 0, 2, 31, 43
+mm3, RegMMX, 0, 3, 32, 44
+mm4, RegMMX, 0, 4, 33, 45
+mm5, RegMMX, 0, 5, 34, 46
+mm6, RegMMX, 0, 6, 35, 47
+mm7, RegMMX, 0, 7, 36, 48
+xmm0, RegXMM, 0, 0, 21, 17
+xmm1, RegXMM, 0, 1, 22, 18
+xmm2, RegXMM, 0, 2, 23, 19
+xmm3, RegXMM, 0, 3, 24, 20
+xmm4, RegXMM, 0, 4, 25, 21
+xmm5, RegXMM, 0, 5, 26, 22
+xmm6, RegXMM, 0, 6, 27, 23
+xmm7, RegXMM, 0, 7, 28, 24
+xmm8, RegXMM, RegRex, 0, , 25
+xmm9, RegXMM, RegRex, 1, , 26
+xmm10, RegXMM, RegRex, 2, , 27
+xmm11, RegXMM, RegRex, 3, , 28
+xmm12, RegXMM, RegRex, 4, , 29
+xmm13, RegXMM, RegRex, 5, , 30
+xmm14, RegXMM, RegRex, 6, , 31
+xmm15, RegXMM, RegRex, 7, , 32
// No type will make these registers rejected for all purposes except
// for addressing. This saves creating one extra type for RIP/EIP.
-rip, BaseIndex, RegRex64, RegRip
-eip, BaseIndex, RegRex64, RegEip
+rip, BaseIndex, RegRex64, RegRip, , 16
+eip, BaseIndex, RegRex64, RegEip, 8
// No type will make these registers rejected for all purposes except
// for addressing.
eiz, BaseIndex, 0, RegEiz
riz, BaseIndex, 0, RegRiz
// fp regs.
-st(0), FloatReg|FloatAcc, 0, 0
-st(1), FloatReg, 0, 1
-st(2), FloatReg, 0, 2
-st(3), FloatReg, 0, 3
-st(4), FloatReg, 0, 4
-st(5), FloatReg, 0, 5
-st(6), FloatReg, 0, 6
-st(7), FloatReg, 0, 7
+st(0), FloatReg|FloatAcc, 0, 0, 11, 33
+st(1), FloatReg, 0, 1, 12, 34
+st(2), FloatReg, 0, 2, 13, 35
+st(3), FloatReg, 0, 3, 14, 36
+st(4), FloatReg, 0, 4, 15, 37
+st(5), FloatReg, 0, 5, 16, 38
+st(6), FloatReg, 0, 6, 17, 39
+st(7), FloatReg, 0, 7, 18, 40
+// Pseudo-register names only used in .cfi_* directives
+eflags, 0, 0, 0, 9, 49
+rflags, 0, 0, 0, , 49
+fs.base, 0, 0, 0, , 58
+gs.base, 0, 0, 0, , 59
+tr, 0, 0, 0, 48, 62
+ldtr, 0, 0, 0, 49, 63
+st0, 0, 0, 0, 11, 33
+st1, 0, 0, 1, 12, 34
+st2, 0, 0, 2, 13, 35
+st3, 0, 0, 3, 14, 36
+st4, 0, 0, 4, 15, 37
+st5, 0, 0, 5, 16, 38
+st6, 0, 0, 6, 17, 39
+st7, 0, 0, 7, 18, 40
+fcw, 0, 0, 0, 37, 65
+fsw, 0, 0, 0, 38, 66
+mxcsr, 0, 0, 0, 39, 64