Re: PATCH: PR gas/5534: "XXX PTR" isn'tcheckedproperlyinIntelsyntax

["H.J. Lu" <hjl at lucon dot org>]

On Mon, Jan 14, 2008 at 10:16:19AM -0800, H.J. Lu wrote:
> On Mon, Jan 14, 2008 at 04:41:04PM +0000, Jan Beulich wrote:
> > >> >If you can find a case where Unspecified is used with more than 1 sizes
> > >> >in a different way, please let me know.
> > >> 
> > >> - base opcode 0xC6 (the immediate doesn't allow deriving a size)
> > >> - movsx
> > >> - movzx
> > >> - push (base opcode 0xFF)
> > >> - pop (base opcode 0x8F)
> > >> - base opcodes 0x80 and 0x83
> > >> - inc/dec (base opcode 0xFE)
> > >
> > >I didn't see it at least for movsx,
> > >
> > >movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
> > >movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
> > >movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg32|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
> > >
> > >One one size and Unspecified are allowed. What is wrong with that?
> > 
> > The fact this (according to your description) allows
> > 
> > 	movsx	eax, [eax]
> > 
> > which is ambiguous.
> 
> This is checked by process_suffix. I am planning to clean up
> process_suffix. Then we will need to update the opcode table. I
> will see what I can do in the meantime. In any case, I will
> leave AT&T syntax alone and enforce size for Intel mode.
> 
> 

This is the patch I checked in. I left most of Unspecified alone
since I don't want to break the existing code in Intel syntax.
Please feel free to remove those Unspecified with more than one
size. But please make sure that AT&T syntax still works.

The x86 assembler needs some cleanup. My change should help
the cleanup process.


H.J.
---
gas/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_reg_size): New.
	(match_mem_size): Likewise.
	(operand_size_match): Likewise.
	(operand_type_match): Also clear all size fields.
	(match_template): Skip Intel syntax when in AT&T syntax.
	Call operand_size_match to check operand size.

	(i386_att_operand): Set the mem field to 1 for memory
	operand.
	(i386_intel_operand): Likewise.

gas/testsuite/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
	* gas/i386/inval.s: Likewise. 
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

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